[Mesa-dev] [PATCH 14/14] i965: Lower bitfieldInsert.

[Matt Turner]

v2: Only lower bitfieldInsert to BFM+BFI (and don't lower
    bitfieldExtract at all) since three-source instructions are now
    usable in the vertex shader.
---
 src/mesa/drivers/dri/i965/brw_shader.cpp | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 5addff6..efe7151 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -151,6 +151,15 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
        * must precede lower_instructions().
        */
       brw_lower_packing_builtins(brw, (gl_shader_type) stage, shader->ir);
+
+      /* bitfield lowering passes insert subtraction instructions which need
+       * to be lowered, so it must precede lower_instructions(SUB_TO_ADD_NEG).
+       */
+      int bitfield_insert = intel->gen >= 7
+                            ? BITFIELD_INSERT_TO_BFM_BFI
+                            : 0;
+      lower_instructions(shader->ir, bitfield_insert);
+
       do_mat_op_to_vec(shader->ir);
       const int lrp_to_arith = intel->gen < 6 ? LRP_TO_ARITH : 0;
       lower_instructions(shader->ir,
-- 
1.8.1.5