[Mesa-dev] [PATCH 06/14] glsl: Add a pass to lower bitfield-insert into bfm+bfi.

[Eric Anholt]

Matt Turner <mattst88 at gmail.com> writes:

> i965/Gen7+ and Radeon/Evergreen+ have bfm/bfi instructions to implement
> bitfieldInsert() from ARB_gpu_shader5.
>
> v2: Add ir_binop_bfm and ir_triop_bfi to st_glsl_to_tgsi.cpp.
>     Remove spurious temporary assignment and dereference.


> +void
> +lower_instructions_visitor::bitfield_insert_to_bfm_bfi(ir_expression *ir)
> +{
> +   /* Translates
> +    *    ir_quadop_bitfield_insert base insert offset bits
> +    * into
> +    *    ir_triop_bfi (ir_binop_bfm bits offset) insert base
> +    */
> +
> +   ir_rvalue *base_expr = ir->operands[0];
> +
> +   ir->operation = ir_triop_bfi;
> +   ir->operands[0] = new(ir) ir_expression(ir_binop_bfm, ir->type,
> +                                           swizzle_xxxx(ir->operands[3]),
> +                                           swizzle_xxxx(ir->operands[2]));
> +   /* ir->operands[1] is still the value to insert. */
> +   ir->operands[2] = base_expr;
> +   ir->operands[3] = NULL;
> +

If the two args to the bfm part are always scalars (because that's how
GLSL's prototype is), why are you expanding it out to a vec4 here and
then dropping the other 3 components of the vec4 in i965's FS backend?
Why not just swizzle_xxxx the result of the ir_expression() on the
scalars?
-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 197 bytes
Desc: not available
URL: <http://lists.freedesktop.org/archives/mesa-dev/attachments/20130429/4dac2105/attachment.pgp>