[Mesa-dev] [PATCH 1/4] i965: Tidy preprocessor macros for SO_NUM_PRIMS_WRITTEN registers.
Kenneth Graunke
kenneth at whitecape.org
Thu Aug 1 15:11:37 PDT 2013
Gen7+ supports four transform feedback streams. Using a function-like
macro makes it easy to access them by stream number or loop over them.
"GEN7_" prefixes are more common than "_IVB" suffixes, so we use that.
Gen6 only supports a single stream, so the single #define should be
fine. However, SO_NUM_PRIMS_WRITTEN was confusingly generic, as it
doesn't exist on Gen7+. Add a "GEN6_" prefix for clarity.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
src/mesa/drivers/dri/i965/gen6_queryobj.c | 4 ++--
src/mesa/drivers/dri/i965/intel_reg.h | 7 ++-----
2 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_queryobj.c b/src/mesa/drivers/dri/i965/gen6_queryobj.c
index 6f4f6f5..498b187 100644
--- a/src/mesa/drivers/dri/i965/gen6_queryobj.c
+++ b/src/mesa/drivers/dri/i965/gen6_queryobj.c
@@ -139,9 +139,9 @@ write_xfb_primitives_written(struct brw_context *brw,
drm_intel_bo *query_bo, int idx)
{
if (brw->gen >= 7) {
- write_reg(brw, query_bo, SO_NUM_PRIMS_WRITTEN0_IVB, idx);
+ write_reg(brw, query_bo, GEN7_SO_NUM_PRIMS_WRITTEN(0), idx);
} else {
- write_reg(brw, query_bo, SO_NUM_PRIMS_WRITTEN, idx);
+ write_reg(brw, query_bo, GEN6_SO_NUM_PRIMS_WRITTEN, idx);
}
}
diff --git a/src/mesa/drivers/dri/i965/intel_reg.h b/src/mesa/drivers/dri/i965/intel_reg.h
index f45a8f3..470f61c 100644
--- a/src/mesa/drivers/dri/i965/intel_reg.h
+++ b/src/mesa/drivers/dri/i965/intel_reg.h
@@ -115,11 +115,8 @@
#define SO_PRIM_STORAGE_NEEDED2_IVB 0x5250
#define SO_PRIM_STORAGE_NEEDED3_IVB 0x5258
-#define SO_NUM_PRIMS_WRITTEN 0x2288
-#define SO_NUM_PRIMS_WRITTEN0_IVB 0x5200
-#define SO_NUM_PRIMS_WRITTEN1_IVB 0x5208
-#define SO_NUM_PRIMS_WRITTEN2_IVB 0x5210
-#define SO_NUM_PRIMS_WRITTEN3_IVB 0x5218
+#define GEN6_SO_NUM_PRIMS_WRITTEN 0x2288
+#define GEN7_SO_NUM_PRIMS_WRITTEN(n) (0x5200 + (n) * 8)
#define GEN7_SO_WRITE_OFFSET(n) (0x5280 + (n) * 4)
--
1.8.3.4
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