[Mesa-dev] [PATCH 13/20] radeonsi: implement FMASK decompression for MSAA texturing
Marek Olšák
maraeo at gmail.com
Wed Aug 7 17:20:53 PDT 2013
---
src/gallium/drivers/radeonsi/r600_blit.c | 114 +++++++++++++++++++++++----
src/gallium/drivers/radeonsi/radeonsi_pipe.c | 1 +
src/gallium/drivers/radeonsi/radeonsi_pipe.h | 5 ++
src/gallium/drivers/radeonsi/si_state.c | 29 +++++--
src/gallium/drivers/radeonsi/si_state_draw.c | 19 +++++
5 files changed, 149 insertions(+), 19 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/r600_blit.c b/src/gallium/drivers/radeonsi/r600_blit.c
index 3f9a184..2db952c 100644
--- a/src/gallium/drivers/radeonsi/r600_blit.c
+++ b/src/gallium/drivers/radeonsi/r600_blit.c
@@ -239,6 +239,75 @@ void si_flush_depth_textures(struct r600_context *rctx,
}
}
+static void r600_blit_decompress_color(struct pipe_context *ctx,
+ struct r600_texture *rtex,
+ unsigned first_level, unsigned last_level,
+ unsigned first_layer, unsigned last_layer)
+{
+ struct r600_context *rctx = (struct r600_context *)ctx;
+ unsigned layer, level, checked_last_layer, max_layer;
+
+ if (!rtex->dirty_level_mask)
+ return;
+
+ for (level = first_level; level <= last_level; level++) {
+ if (!(rtex->dirty_level_mask & (1 << level)))
+ continue;
+
+ /* The smaller the mipmap level, the less layers there are
+ * as far as 3D textures are concerned. */
+ max_layer = util_max_layer(&rtex->resource.b.b, level);
+ checked_last_layer = last_layer < max_layer ? last_layer : max_layer;
+
+ for (layer = first_layer; layer <= checked_last_layer; layer++) {
+ struct pipe_surface *cbsurf, surf_tmpl;
+
+ surf_tmpl.format = rtex->resource.b.b.format;
+ surf_tmpl.u.tex.level = level;
+ surf_tmpl.u.tex.first_layer = layer;
+ surf_tmpl.u.tex.last_layer = layer;
+ cbsurf = ctx->create_surface(ctx, &rtex->resource.b.b, &surf_tmpl);
+
+ r600_blitter_begin(ctx, R600_DECOMPRESS);
+ util_blitter_custom_color(rctx->blitter, cbsurf,
+ rctx->custom_blend_decompress);
+ r600_blitter_end(ctx);
+
+ pipe_surface_reference(&cbsurf, NULL);
+ }
+
+ /* The texture will always be dirty if some layers aren't flushed.
+ * I don't think this case occurs often though. */
+ if (first_layer == 0 && last_layer == max_layer) {
+ rtex->dirty_level_mask &= ~(1 << level);
+ }
+ }
+}
+
+void r600_decompress_color_textures(struct r600_context *rctx,
+ struct r600_textures_info *textures)
+{
+ unsigned i;
+ unsigned mask = textures->compressed_colortex_mask;
+
+ while (mask) {
+ struct pipe_sampler_view *view;
+ struct r600_texture *tex;
+
+ i = u_bit_scan(&mask);
+
+ view = &textures->views[i]->base;
+ assert(view);
+
+ tex = (struct r600_texture *)view->texture;
+ assert(tex->cmask.size || tex->fmask.size);
+
+ r600_blit_decompress_color(&rctx->context, tex,
+ view->u.tex.first_level, view->u.tex.last_level,
+ 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
+ }
+}
+
static void r600_clear(struct pipe_context *ctx, unsigned buffers,
const union pipe_color_union *color,
double depth, unsigned stencil)
@@ -282,6 +351,28 @@ static void r600_clear_depth_stencil(struct pipe_context *ctx,
r600_blitter_end(ctx);
}
+/* Helper for decompressing a portion of a color or depth resource before
+ * blitting if any decompression is needed.
+ * The driver doesn't decompress resources automatically while u_blitter is
+ * rendering. */
+static void r600_decompress_subresource(struct pipe_context *ctx,
+ struct pipe_resource *tex,
+ unsigned level,
+ unsigned first_layer, unsigned last_layer)
+{
+ struct r600_context *rctx = (struct r600_context *)ctx;
+ struct r600_texture *rtex = (struct r600_texture*)tex;
+
+ if (rtex->is_depth && !rtex->is_flushing_texture) {
+ si_blit_decompress_depth_in_place(rctx, rtex,
+ level, level,
+ first_layer, last_layer);
+ } else if (rtex->fmask.size || rtex->cmask.size) {
+ r600_blit_decompress_color(ctx, rtex, level, level,
+ first_layer, last_layer);
+ }
+}
+
struct texture_orig_info {
unsigned format;
unsigned width0;
@@ -368,7 +459,6 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
const struct pipe_box *src_box)
{
struct r600_context *rctx = (struct r600_context *)ctx;
- struct r600_texture *rsrc = (struct r600_texture*)src;
struct texture_orig_info orig_info[2];
struct pipe_box sbox;
const struct pipe_box *psbox = src_box;
@@ -383,12 +473,10 @@ static void r600_resource_copy_region(struct pipe_context *ctx,
return;
}
- /* This must be done before entering u_blitter to avoid recursion. */
- if (rsrc->is_depth && !rsrc->is_flushing_texture) {
- si_blit_decompress_depth_in_place(rctx, rsrc,
- src_level, src_level,
- src_box->z, src_box->z + src_box->depth - 1);
- }
+ /* The driver doesn't decompress resources automatically while
+ * u_blitter is rendering. */
+ r600_decompress_subresource(ctx, src, src_level,
+ src_box->z, src_box->z + src_box->depth - 1);
restore_orig[0] = restore_orig[1] = FALSE;
@@ -593,7 +681,6 @@ static void si_blit(struct pipe_context *ctx,
const struct pipe_blit_info *info)
{
struct r600_context *rctx = (struct r600_context*)ctx;
- struct r600_texture *rsrc = (struct r600_texture*)info->src.resource;
if (info->src.resource->nr_samples > 1 &&
info->dst.resource->nr_samples <= 1 &&
@@ -605,12 +692,11 @@ static void si_blit(struct pipe_context *ctx,
assert(util_blitter_is_blit_supported(rctx->blitter, info));
- if (rsrc->is_depth && !rsrc->is_flushing_texture) {
- si_blit_decompress_depth_in_place(rctx, rsrc,
- info->src.level, info->src.level,
- info->src.box.z,
- info->src.box.z + info->src.box.depth - 1);
- }
+ /* The driver doesn't decompress resources automatically while
+ * u_blitter is rendering. */
+ r600_decompress_subresource(ctx, info->src.resource, info->src.level,
+ info->src.box.z,
+ info->src.box.z + info->src.box.depth - 1);
r600_blitter_begin(ctx, R600_BLIT);
util_blitter_blit(rctx->blitter, info);
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.c b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
index 53bf348..ad955e3 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_pipe.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
@@ -188,6 +188,7 @@ static void r600_destroy_context(struct pipe_context *context)
rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush_stencil);
rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush_inplace);
rctx->context.delete_blend_state(&rctx->context, rctx->custom_blend_resolve);
+ rctx->context.delete_blend_state(&rctx->context, rctx->custom_blend_decompress);
util_unreference_framebuffer_state(&rctx->framebuffer);
util_blitter_destroy(rctx->blitter);
diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.h b/src/gallium/drivers/radeonsi/radeonsi_pipe.h
index 54b80fc..e370149 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_pipe.h
+++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.h
@@ -102,6 +102,7 @@ struct r600_textures_info {
struct si_pipe_sampler_state *samplers[NUM_TEX_UNITS];
unsigned n_views;
uint32_t depth_texture_mask; /* which textures are depth */
+ uint32_t compressed_colortex_mask;
unsigned n_samplers;
bool samplers_dirty;
bool is_array_sampler[NUM_TEX_UNITS];
@@ -141,12 +142,14 @@ struct r600_context {
void *custom_dsa_flush_stencil;
void *custom_dsa_flush_inplace;
void *custom_blend_resolve;
+ void *custom_blend_decompress;
struct r600_screen *screen;
struct radeon_winsys *ws;
struct si_vertex_element *vertex_elements;
struct pipe_framebuffer_state framebuffer;
unsigned fb_log_samples;
unsigned fb_cb0_is_integer;
+ unsigned fb_compressed_cb_mask;
unsigned pa_sc_line_stipple;
unsigned pa_su_sc_mode_cntl;
/* for saving when using blitter */
@@ -223,6 +226,8 @@ void si_blit_uncompress_depth(struct pipe_context *ctx,
unsigned first_layer, unsigned last_layer);
void si_flush_depth_textures(struct r600_context *rctx,
struct r600_textures_info *textures);
+void r600_decompress_color_textures(struct r600_context *rctx,
+ struct r600_textures_info *textures);
/* r600_buffer.c */
bool si_init_resource(struct r600_screen *rscreen,
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 543d927..6965745 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2246,8 +2246,16 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
/* build states */
rctx->export_16bpc = 0;
+ rctx->fb_compressed_cb_mask = 0;
for (int i = 0; i < state->nr_cbufs; i++) {
+ struct r600_texture *rtex =
+ (struct r600_texture*)state->cbufs[i]->texture;
+
si_cb(rctx, pm4, state, i);
+
+ if (rtex->fmask.size || rtex->cmask.size) {
+ rctx->fb_compressed_cb_mask |= 1 << i;
+ }
}
assert(!(rctx->export_16bpc & ~0xff));
si_db(rctx, pm4, state);
@@ -2798,8 +2806,15 @@ static struct si_pm4_state *si_set_sampler_views(struct r600_context *rctx,
}
si_pm4_add_bo(pm4, resource[i]->resource, RADEON_USAGE_READ);
+
+ if (rtex->cmask.size || rtex->fmask.size) {
+ samplers->compressed_colortex_mask |= 1 << i;
+ } else {
+ samplers->compressed_colortex_mask &= ~(1 << i);
+ }
} else {
samplers->depth_texture_mask &= ~(1 << i);
+ samplers->compressed_colortex_mask &= ~(1 << i);
}
for (j = 0; j < Elements(resource[i]->state); ++j) {
@@ -2807,9 +2822,12 @@ static struct si_pm4_state *si_set_sampler_views(struct r600_context *rctx,
}
}
- for (i = count; i < NUM_TEX_UNITS; i++) {
- if (samplers->views[i])
+ for (i = count; i < rctx->ps_samplers.n_views; i++) {
+ if (samplers->views[i]) {
pipe_sampler_view_reference((struct pipe_sampler_view **)&samplers->views[i], NULL);
+ samplers->depth_texture_mask &= ~(1 << i);
+ samplers->compressed_colortex_mask &= ~(1 << i);
+ }
}
si_pm4_sh_data_end(pm4, user_data_reg, SI_SGPR_RESOURCE);
@@ -3117,14 +3135,14 @@ static void si_texture_barrier(struct pipe_context *ctx)
si_pm4_set_state(rctx, texture_barrier, pm4);
}
-static void *si_create_resolve_blend(struct r600_context *rctx)
+static void *si_create_blend_custom(struct r600_context *rctx, unsigned mode)
{
struct pipe_blend_state blend;
memset(&blend, 0, sizeof(blend));
blend.independent_blend_enable = true;
blend.rt[0].colormask = 0xf;
- return si_create_blend_state_mode(&rctx->context, &blend, V_028808_CB_RESOLVE);
+ return si_create_blend_state_mode(&rctx->context, &blend, mode);
}
void si_init_state_functions(struct r600_context *rctx)
@@ -3146,7 +3164,8 @@ void si_init_state_functions(struct r600_context *rctx)
rctx->custom_dsa_flush_depth = si_create_db_flush_dsa(rctx, true, false);
rctx->custom_dsa_flush_stencil = si_create_db_flush_dsa(rctx, false, true);
rctx->custom_dsa_flush_inplace = si_create_db_flush_dsa(rctx, false, false);
- rctx->custom_blend_resolve = si_create_resolve_blend(rctx);
+ rctx->custom_blend_resolve = si_create_blend_custom(rctx, V_028808_CB_RESOLVE);
+ rctx->custom_blend_decompress = si_create_blend_custom(rctx, V_028808_CB_FMASK_DECOMPRESS);
rctx->context.set_clip_state = si_set_clip_state;
rctx->context.set_scissor_states = si_set_scissor_states;
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 60bca72..746ace6 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -419,6 +419,12 @@ static void si_update_derived_state(struct r600_context *rctx)
if (rctx->ps_samplers.depth_texture_mask) {
si_flush_depth_textures(rctx, &rctx->ps_samplers);
}
+ if (rctx->vs_samplers.compressed_colortex_mask) {
+ r600_decompress_color_textures(rctx, &rctx->vs_samplers);
+ }
+ if (rctx->ps_samplers.compressed_colortex_mask) {
+ r600_decompress_color_textures(rctx, &rctx->ps_samplers);
+ }
}
si_shader_select(ctx, rctx->vs_shader, &vs_dirty);
@@ -747,6 +753,19 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
rtex->dirty_level_mask |= 1 << surf->u.tex.level;
}
+ if (rctx->fb_compressed_cb_mask) {
+ struct pipe_surface *surf;
+ struct r600_texture *rtex;
+ unsigned mask = rctx->fb_compressed_cb_mask;
+
+ do {
+ unsigned i = u_bit_scan(&mask);
+ surf = rctx->framebuffer.cbufs[i];
+ rtex = (struct r600_texture*)surf->texture;
+
+ rtex->dirty_level_mask |= 1 << surf->u.tex.level;
+ } while (mask);
+ }
pipe_resource_reference(&ib.buffer, NULL);
}
--
1.8.1.2
More information about the mesa-dev
mailing list