[Mesa-dev] [PATCH 12/20] radeonsi: implement MSAA colorbuffer compression for rendering

[Marek Olšák]

Do you mean the surface_sync pm4 or the one in si_state?

Marek

On Thu, Aug 8, 2013 at 10:31 AM, Michel Dänzer <michel at daenzer.net> wrote:
> On Don, 2013-08-08 at 02:20 +0200, Marek Olšák wrote:
>>
>> diff --git a/src/gallium/drivers/radeonsi/r600_hw_context.c b/src/gallium/drivers/radeonsi/r600_hw_context.c
>> index 25c972b..382382b 100644
>> --- a/src/gallium/drivers/radeonsi/r600_hw_context.c
>> +++ b/src/gallium/drivers/radeonsi/r600_hw_context.c
>> @@ -179,6 +179,17 @@ static void r600_flush_framebuffer(struct r600_context *ctx)
>>       si_pm4_emit(ctx, pm4);
>>       si_pm4_free_state(ctx, pm4, ~0);
>>
>> +     /* flush CB_META */
>> +     pm4 = si_pm4_alloc_state(ctx);
>> +
>> +     if (pm4 == NULL)
>> +             return;
>> +
>> +     si_cmd_flush_and_inv_cb_meta(pm4);
>> +     si_pm4_emit(ctx, pm4);
>> +     si_pm4_free_state(ctx, pm4, ~0);
>> +     ctx->flush_and_inv_cb_meta = false;
>> +
>>       ctx->flags &= ~R600_CONTEXT_DST_CACHES_DIRTY;
>>  }
>
> Can't you add to the existing pm4 here, instead of allocating a new one?
>
>
> --
> Earthling Michel Dänzer           |                   http://www.amd.com
> Libre software enthusiast         |          Debian, X and DRI developer
>