[Mesa-dev] [PATCH 20/22] i965/gen7: merge defines for 3DSTATE{VS, GS, WM} dword 2
Kenneth Graunke
kenneth at whitecape.org
Wed Aug 28 20:16:02 PDT 2013
On 08/26/2013 03:12 PM, Paul Berry wrote:
> Dword 2 of all 3DSTATE commands is the same, so there's no need tohave
Well, not -all- 3DSTATE commands...just these :)
It's weird that you decided to share the bits for 3DSTATE_VS,
3DSTATE_GS, and 3DSTATE_WM on SNB, but not GEN7_PS_* for 3DSTATE_PS on
IVB. If you're going to do WM, you might as well do PS too...
> separate defines for it. This will allow us to unify some of the
> state setup code between VS and GS.
> ---
> src/mesa/drivers/dri/i965/brw_defines.h | 30 +++++++++---------------------
> src/mesa/drivers/dri/i965/gen6_blorp.cpp | 2 +-
> src/mesa/drivers/dri/i965/gen6_gs_state.c | 6 +++---
> src/mesa/drivers/dri/i965/gen6_vs_state.c | 4 ++--
> src/mesa/drivers/dri/i965/gen6_wm_state.c | 4 ++--
> src/mesa/drivers/dri/i965/gen7_disable.c | 4 ++--
> src/mesa/drivers/dri/i965/gen7_vs_state.c | 4 ++--
> 7 files changed, 21 insertions(+), 33 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
> index ec6c854..d698757 100644
> --- a/src/mesa/drivers/dri/i965/brw_defines.h
> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> @@ -1303,14 +1303,16 @@ enum brw_message_target {
>
> #define _3DSTATE_SCISSOR_STATE_POINTERS 0x780f /* GEN6+ */
>
> -#define _3DSTATE_VS 0x7810 /* GEN6+ */
> +/* Common to _3DSTATE_{VS,GS} */
No mention of WM here. Maybe:
/* Common to 3DSTATE_{VS,GS,PS|WM} */
> /* DW2 */
> -# define GEN6_VS_SPF_MODE (1 << 31)
> -# define GEN6_VS_VECTOR_MASK_ENABLE (1 << 30)
> -# define GEN6_VS_SAMPLER_COUNT_SHIFT 27
> -# define GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
> -# define GEN6_VS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
> -# define GEN6_VS_FLOATING_POINT_MODE_ALT (1 << 16)
> +# define GEN6_SPF_MODE (1 << 31)
> +# define GEN6_VECTOR_MASK_ENABLE (1 << 30)
> +# define GEN6_SAMPLER_COUNT_SHIFT 27
> +# define GEN6_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
> +# define GEN6_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
> +# define GEN6_FLOATING_POINT_MODE_ALT (1 << 16)
> +
> +#define _3DSTATE_VS 0x7810 /* GEN6+ */
> /* DW4 */
> # define GEN6_VS_DISPATCH_START_GRF_SHIFT 20
> # define GEN6_VS_URB_READ_LENGTH_SHIFT 11
> @@ -1323,13 +1325,6 @@ enum brw_message_target {
> # define GEN6_VS_ENABLE (1 << 0)
>
> #define _3DSTATE_GS 0x7811 /* GEN6+ */
> -/* DW2 */
> -# define GEN6_GS_SPF_MODE (1 << 31)
> -# define GEN6_GS_VECTOR_MASK_ENABLE (1 << 30)
> -# define GEN6_GS_SAMPLER_COUNT_SHIFT 27
> -# define GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
> -# define GEN6_GS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
> -# define GEN6_GS_FLOATING_POINT_MODE_ALT (1 << 16)
> /* DW4 */
> # define GEN6_GS_URB_READ_LENGTH_SHIFT 11
> # define GEN7_GS_INCLUDE_VERTEX_HANDLES (1 << 10)
> @@ -1518,13 +1513,6 @@ enum brw_wm_barycentric_interp_mode {
>
> #define _3DSTATE_WM 0x7814 /* GEN6+ */
> /* DW1: kernel pointer */
> -/* DW2 */
> -# define GEN6_WM_SPF_MODE (1 << 31)
> -# define GEN6_WM_VECTOR_MASK_ENABLE (1 << 30)
> -# define GEN6_WM_SAMPLER_COUNT_SHIFT 27
> -# define GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
> -# define GEN6_WM_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
> -# define GEN6_WM_FLOATING_POINT_MODE_ALT (1 << 16)
> /* DW3: scratch space */
> /* DW4 */
> # define GEN6_WM_STATISTICS_ENABLE (1 << 31)
> diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
> index 1c85921..4b11d72 100644
> --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
> +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
> @@ -727,7 +727,7 @@ gen6_blorp_emit_wm_config(struct brw_context *brw,
> dw6 |= 0 << GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT; /* No interp */
> dw6 |= 0 << GEN6_WM_NUM_SF_OUTPUTS_SHIFT; /* No inputs from SF */
> if (params->use_wm_prog) {
> - dw2 |= 1 << GEN6_WM_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */
> + dw2 |= 1 << GEN6_SAMPLER_COUNT_SHIFT; /* Up to 4 samplers */
> dw4 |= prog_data->first_curbe_grf << GEN6_WM_DISPATCH_START_GRF_SHIFT_0;
> dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
> dw5 |= GEN6_WM_KILL_ENABLE; /* TODO: temporarily smash on */
> diff --git a/src/mesa/drivers/dri/i965/gen6_gs_state.c b/src/mesa/drivers/dri/i965/gen6_gs_state.c
> index 9648fb7..29f9042 100644
> --- a/src/mesa/drivers/dri/i965/gen6_gs_state.c
> +++ b/src/mesa/drivers/dri/i965/gen6_gs_state.c
> @@ -46,7 +46,7 @@ upload_gs_state(struct brw_context *brw)
> BEGIN_BATCH(7);
> OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2));
> OUT_BATCH(brw->ff_gs.prog_offset);
> - OUT_BATCH(GEN6_GS_SPF_MODE | GEN6_GS_VECTOR_MASK_ENABLE);
> + OUT_BATCH(GEN6_SPF_MODE | GEN6_VECTOR_MASK_ENABLE);
> OUT_BATCH(0); /* no scratch space */
> OUT_BATCH((2 << GEN6_GS_DISPATCH_START_GRF_SHIFT) |
> (brw->ff_gs.prog_data->urb_read_length << GEN6_GS_URB_READ_LENGTH_SHIFT));
> @@ -64,8 +64,8 @@ upload_gs_state(struct brw_context *brw)
> BEGIN_BATCH(7);
> OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2));
> OUT_BATCH(0); /* prog_bo */
> - OUT_BATCH((0 << GEN6_GS_SAMPLER_COUNT_SHIFT) |
> - (0 << GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
> + OUT_BATCH((0 << GEN6_SAMPLER_COUNT_SHIFT) |
> + (0 << GEN6_BINDING_TABLE_ENTRY_COUNT_SHIFT));
> OUT_BATCH(0); /* scratch space base offset */
> OUT_BATCH((1 << GEN6_GS_DISPATCH_START_GRF_SHIFT) |
> (0 << GEN6_GS_URB_READ_LENGTH_SHIFT) |
> diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c
> index f59b353..f2fcf66 100644
> --- a/src/mesa/drivers/dri/i965/gen6_vs_state.c
> +++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c
> @@ -159,13 +159,13 @@ upload_vs_state(struct brw_context *brw)
> * require 0^0 == 1.
> */
> if (ctx->Shader.CurrentVertexProgram == NULL)
> - floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT;
> + floating_point_mode = GEN6_FLOATING_POINT_MODE_ALT;
>
> BEGIN_BATCH(6);
> OUT_BATCH(_3DSTATE_VS << 16 | (6 - 2));
> OUT_BATCH(vec4_ctx->prog_offset);
> OUT_BATCH(floating_point_mode |
> - ((ALIGN(vec4_ctx->sampler_count, 4)/4) << GEN6_VS_SAMPLER_COUNT_SHIFT));
> + ((ALIGN(vec4_ctx->sampler_count, 4)/4) << GEN6_SAMPLER_COUNT_SHIFT));
>
> if (brw->vs.prog_data->base.total_scratch) {
> OUT_RELOC(vec4_ctx->scratch_bo,
> diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
> index 6725805..31f9746 100644
> --- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
> +++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
> @@ -137,10 +137,10 @@ upload_wm_state(struct brw_context *brw)
> * differentiate between the GLSL and non-GLSL cases.
> */
> if (ctx->Shader.CurrentFragmentProgram == NULL)
> - dw2 |= GEN6_WM_FLOATING_POINT_MODE_ALT;
> + dw2 |= GEN6_FLOATING_POINT_MODE_ALT;
>
> /* CACHE_NEW_SAMPLER */
> - dw2 |= (ALIGN(brw->wm.sampler_count, 4) / 4) << GEN6_WM_SAMPLER_COUNT_SHIFT;
> + dw2 |= (ALIGN(brw->wm.sampler_count, 4) / 4) << GEN6_SAMPLER_COUNT_SHIFT;
> dw4 |= (brw->wm.prog_data->first_curbe_grf <<
> GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
> dw4 |= (brw->wm.prog_data->first_curbe_grf_16 <<
> diff --git a/src/mesa/drivers/dri/i965/gen7_disable.c b/src/mesa/drivers/dri/i965/gen7_disable.c
> index 860aa95..d7f9405 100644
> --- a/src/mesa/drivers/dri/i965/gen7_disable.c
> +++ b/src/mesa/drivers/dri/i965/gen7_disable.c
> @@ -45,8 +45,8 @@ disable_stages(struct brw_context *brw)
> BEGIN_BATCH(7);
> OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2));
> OUT_BATCH(0); /* prog_bo */
> - OUT_BATCH((0 << GEN6_GS_SAMPLER_COUNT_SHIFT) |
> - (0 << GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
> + OUT_BATCH((0 << GEN6_SAMPLER_COUNT_SHIFT) |
> + (0 << GEN6_BINDING_TABLE_ENTRY_COUNT_SHIFT));
> OUT_BATCH(0); /* scratch space base offset */
> OUT_BATCH((1 << GEN6_GS_DISPATCH_START_GRF_SHIFT) |
> (0 << GEN6_GS_URB_READ_LENGTH_SHIFT) |
> diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c
> index 36fccf7..30fe802 100644
> --- a/src/mesa/drivers/dri/i965/gen7_vs_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c
> @@ -82,14 +82,14 @@ upload_vs_state(struct brw_context *brw)
> * require 0^0 == 1.
> */
> if (ctx->Shader.CurrentVertexProgram == NULL)
> - floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT;
> + floating_point_mode = GEN6_FLOATING_POINT_MODE_ALT;
>
> BEGIN_BATCH(6);
> OUT_BATCH(_3DSTATE_VS << 16 | (6 - 2));
> OUT_BATCH(vec4_ctx->prog_offset);
> OUT_BATCH(floating_point_mode |
> ((ALIGN(vec4_ctx->sampler_count, 4)/4) <<
> - GEN6_VS_SAMPLER_COUNT_SHIFT));
> + GEN6_SAMPLER_COUNT_SHIFT));
>
> if (brw->vs.prog_data->base.total_scratch) {
> OUT_RELOC(vec4_ctx->scratch_bo,
>
More information about the mesa-dev
mailing list