[Mesa-dev] [PATCH 12/23] i965/vec4: Fix off-by-one register class overallocation.

[Francisco Jerez]

---
 src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
index 951560b..b19b40d 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
@@ -121,7 +121,7 @@ brw_vec4_alloc_reg_set(struct brw_context *brw)
    if (brw->gen >= 6)
       ra_set_allocate_round_robin(brw->vec4.regs);
    ralloc_free(brw->vec4.classes);
-   brw->vec4.classes = ralloc_array(brw, int, class_count + 1);
+   brw->vec4.classes = ralloc_array(brw, int, class_count);
 
    /* Now, add the registers to their classes, and add the conflicts
     * between them and the base GRF registers (and also each other).
-- 
1.8.3.4