[Mesa-dev] [PATCH 3/4] radeonsi: Rearrange si_create_dsa_state
Alex Deucher
alexdeucher at gmail.com
Tue Dec 3 14:56:26 PST 2013
On Tue, Dec 3, 2013 at 3:33 PM, Andreas Hartmetz <ahartmetz at gmail.com> wrote:
> Reduce scope of variables and divide the code more clearly into
> sections dealing with one thing.
> ---
> src/gallium/drivers/radeonsi/si_state.c | 38 +++++++++++++++++++--------------
> 1 file changed, 22 insertions(+), 16 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
> index 7bae72a..24c9cf3 100644
> --- a/src/gallium/drivers/radeonsi/si_state.c
> +++ b/src/gallium/drivers/radeonsi/si_state.c
> @@ -706,25 +706,20 @@ static void *si_create_dsa_state(struct pipe_context *ctx,
> const struct pipe_depth_stencil_alpha_state *state)
> {
> struct si_state_dsa *dsa = CALLOC_STRUCT(si_state_dsa);
> - struct si_pm4_state *pm4 = &dsa->pm4;
> - unsigned db_depth_control;
> - unsigned db_render_override, db_render_control;
> - uint32_t db_stencil_control = 0;
> -
Please don't mix code and declarations, some compilers don't like that.
Alex
> if (dsa == NULL) {
> return NULL;
> }
>
> + unsigned db_depth_control = 0;
> +
> + /* stencil */
> +
> dsa->valuemask[0] = state->stencil[0].valuemask;
> dsa->valuemask[1] = state->stencil[1].valuemask;
> dsa->writemask[0] = state->stencil[0].writemask;
> dsa->writemask[1] = state->stencil[1].writemask;
>
> - db_depth_control = S_028800_Z_ENABLE(state->depth.enabled) |
> - S_028800_Z_WRITE_ENABLE(state->depth.writemask) |
> - S_028800_ZFUNC(state->depth.func);
> -
> - /* stencil */
> + uint32_t db_stencil_control = 0;
> if (state->stencil[0].enabled) {
> db_depth_control |= S_028800_STENCIL_ENABLE(1);
> db_depth_control |= S_028800_STENCILFUNC(state->stencil[0].func);
> @@ -740,8 +735,13 @@ static void *si_create_dsa_state(struct pipe_context *ctx,
> db_stencil_control |= S_02842C_STENCILZFAIL_BF(si_translate_stencil_op(state->stencil[1].zfail_op));
> }
> }
> + unsigned db_render_override = S_02800C_FORCE_HIS_ENABLE0(V_02800C_FORCE_DISABLE) |
> + S_02800C_FORCE_HIS_ENABLE1(V_02800C_FORCE_DISABLE);
>
> /* alpha */
> +
> + struct si_pm4_state *pm4 = &dsa->pm4;
> +
> if (state->alpha.enabled) {
> dsa->alpha_func = state->alpha.func;
> dsa->alpha_ref = state->alpha.ref_value;
> @@ -752,12 +752,19 @@ static void *si_create_dsa_state(struct pipe_context *ctx,
> dsa->alpha_func = PIPE_FUNC_ALWAYS;
> }
>
> - /* misc */
> - db_render_control = 0;
> - db_render_override = S_02800C_FORCE_HIZ_ENABLE(V_02800C_FORCE_DISABLE) |
> - S_02800C_FORCE_HIS_ENABLE0(V_02800C_FORCE_DISABLE) |
> - S_02800C_FORCE_HIS_ENABLE1(V_02800C_FORCE_DISABLE);
> + /* depth */
> +
> + db_depth_control |= S_028800_Z_ENABLE(state->depth.enabled) |
> + S_028800_Z_WRITE_ENABLE(state->depth.writemask) |
> + S_028800_ZFUNC(state->depth.func);
> + db_render_override |= S_02800C_FORCE_HIZ_ENABLE(V_02800C_FORCE_DISABLE);
> +
> + /* write remaining registers and return */
> +
> /* TODO db_render_override depends on query */
> + dsa->db_render_override = db_render_override;
> + unsigned db_render_control = 0;
> +
> si_pm4_set_reg(pm4, R_028020_DB_DEPTH_BOUNDS_MIN, 0x00000000);
> si_pm4_set_reg(pm4, R_028024_DB_DEPTH_BOUNDS_MAX, 0x00000000);
> si_pm4_set_reg(pm4, R_028028_DB_STENCIL_CLEAR, 0x00000000);
> @@ -770,7 +777,6 @@ static void *si_create_dsa_state(struct pipe_context *ctx,
> si_pm4_set_reg(pm4, R_028AC0_DB_SRESULTS_COMPARE_STATE0, 0x0);
> si_pm4_set_reg(pm4, R_028AC4_DB_SRESULTS_COMPARE_STATE1, 0x0);
> si_pm4_set_reg(pm4, R_028AC8_DB_PRELOAD_CONTROL, 0x0);
> - dsa->db_render_override = db_render_override;
>
> return dsa;
> }
> --
> 1.8.3.2
>
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