[Mesa-dev] [PATCH 3/3] i965/fs: add support for gl_SampleMaskIn[]

[Kenneth Graunke]

On 12/08/2013 12:23 AM, Chris Forbes wrote:
> Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp         | 22 +++++++++++++++++++++-
>  src/mesa/drivers/dri/i965/brw_fs.h           |  1 +
>  src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |  2 ++
>  src/mesa/drivers/dri/i965/brw_wm.h           |  1 +
>  src/mesa/drivers/dri/i965/gen7_wm_state.c    |  4 ++++
>  5 files changed, 29 insertions(+), 1 deletion(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index dbd93e7..9063563 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -1255,6 +1255,16 @@ fs_visitor::emit_sampleid_setup(ir_variable *ir)
>     return reg;
>  }
>  
> +fs_reg *
> +fs_visitor::emit_samplemaskin_setup(ir_variable *ir)
> +{
> +   assert(brw->gen >= 7);
> +   this->current_annotation = "compute gl_SampleMaskIn";
> +   fs_reg *reg = new(this->mem_ctx) fs_reg(this, ir->type);
> +   emit(MOV(*reg, fs_reg(retype(brw_vec8_grf(c->sample_mask_reg, 0), BRW_REGISTER_TYPE_D))));
> +   return reg;
> +}
> +
>  fs_reg
>  fs_visitor::fix_math_operand(fs_reg src)
>  {
> @@ -3073,7 +3083,17 @@ fs_visitor::setup_payload_gen6()
>        c->nr_payload_regs++;
>     }
>  
> -   /* R32-: bary for 32-pixel. */
> +   /* R32: MSAA input coverage mask */
> +   if (fp->Base.SystemValuesRead & SYSTEM_BIT_SAMPLE_MASK_IN) {

I'd appreciate an

      assert(brw->gen >= 7);

here, since R32 and R33 aren't coverage masks on Gen6.  (In fact, they
don't seem to exist...)

> +      c->sample_mask_reg = c->nr_payload_regs;
> +      c->nr_payload_regs++;
> +      if (dispatch_width == 16) {
> +         /* R33: input coverage mask if not 8-wide. */
> +         c->nr_payload_regs++;
> +      }
> +   }
> +
> +   /* R34-: bary for 32-pixel. */
>     /* R58-59: interp W for 32-pixel. */
>  
>     if (fp->Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
> index e516046..9bef07c 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -340,6 +340,7 @@ public:
>     fs_reg *emit_frontfacing_interpolation(ir_variable *ir);
>     fs_reg *emit_samplepos_setup(ir_variable *ir);
>     fs_reg *emit_sampleid_setup(ir_variable *ir);
> +   fs_reg *emit_samplemaskin_setup(ir_variable *ir);
>     fs_reg *emit_general_interpolation(ir_variable *ir);
>     void emit_interpolation_setup_gen4();
>     void emit_interpolation_setup_gen6();
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> index a28dc6c..da75410 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> @@ -136,6 +136,8 @@ fs_visitor::visit(ir_variable *ir)
>  	 reg = emit_samplepos_setup(ir);
>        } else if (ir->location == SYSTEM_VALUE_SAMPLE_ID) {
>  	 reg = emit_sampleid_setup(ir);
> +      } else if (ir->location == SYSTEM_VALUE_SAMPLE_MASK_IN) {
> +         reg = emit_samplemaskin_setup(ir);
>        }
>     }
>  
> diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
> index 556b5ae..2ee126b 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm.h
> +++ b/src/mesa/drivers/dri/i965/brw_wm.h
> @@ -88,6 +88,7 @@ struct brw_wm_compile {
>     uint8_t aa_dest_stencil_reg;
>     uint8_t dest_depth_reg;
>     uint8_t sample_pos_reg;
> +   uint8_t sample_mask_reg;
>     uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
>     uint8_t nr_payload_regs;
>     GLuint source_depth_to_render_target:1;
> diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
> index abbc73c..b6561bb 100644
> --- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
> @@ -112,6 +112,10 @@ upload_wm_state(struct brw_context *brw)
>        dw2 |= GEN7_WM_MSDISPMODE_PERSAMPLE;
>     }
>  
> +   if (fp->program.Base.SystemValuesRead & SYSTEM_BIT_SAMPLE_MASK_IN) {
> +      dw1 |= GEN7_WM_USES_INPUT_COVERAGE_MASK;
> +   }
> +
>     BEGIN_BATCH(3);
>     OUT_BATCH(_3DSTATE_WM << 16 | (3 - 2));
>     OUT_BATCH(dw1);
> 

Otherwise, this series looks good!  All three are:
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>