[Mesa-dev] [PATCH v2 1/1] R600: Allow ftrunc

[Tom Stellard]

On Wed, Dec 18, 2013 at 03:41:09PM -0500, Jan Vesely wrote:
> v2: Add ftrunc->TRUNC pattern instead of replacing int_AMDGPU_trunc
> 
> Signed-off-by: Jan Vesely <jan.vesely at rutgers.edu>
> ---
>  lib/Target/R600/AMDGPUISelLowering.cpp | 2 ++
>  lib/Target/R600/R600Instructions.td    | 2 ++
>  2 files changed, 4 insertions(+)
> 
> diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp
> index d7ee8e6..c59be7c 100644
> --- a/lib/Target/R600/AMDGPUISelLowering.cpp
> +++ b/lib/Target/R600/AMDGPUISelLowering.cpp
> @@ -60,6 +60,7 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
>    setOperationAction(ISD::FFLOOR, MVT::f32, Legal);
>    setOperationAction(ISD::FRINT,  MVT::f32, Legal);
>    setOperationAction(ISD::FROUND, MVT::f32, Legal);
> +  setOperationAction(ISD::FTRUNC, MVT::f32, Legal);
>  
>    // The hardware supports ROTR, but not ROTL
>    setOperationAction(ISD::ROTL, MVT::i32, Expand);
> @@ -184,6 +185,7 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
>      setOperationAction(ISD::FADD, VT, Expand);
>      setOperationAction(ISD::FDIV, VT, Expand);
>      setOperationAction(ISD::FFLOOR, VT, Expand);
> +    setOperationAction(ISD::FTRUNC, VT, Expand);
>      setOperationAction(ISD::FMUL, VT, Expand);
>      setOperationAction(ISD::FRINT, VT, Expand);
>      setOperationAction(ISD::FSQRT, VT, Expand);
> diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td
> index 2249cee..cd31d36 100644
> --- a/lib/Target/R600/R600Instructions.td
> +++ b/lib/Target/R600/R600Instructions.td
> @@ -1734,6 +1734,8 @@ def LDS_USHORT_READ_RET : R600_LDS_1A <0x39, "LDS_USHORT_READ_RET",
>    def : Pat<(fp_to_sint f32:$src0), (FLT_TO_INT_eg (TRUNC $src0))>;
>  
>    def : Pat<(fp_to_uint f32:$src0), (FLT_TO_UINT_eg (TRUNC $src0))>;
> +  // Add also trunc since we need it too.
> +  def : Pat<(ftrunc f32:$src0), (TRUNC $src0)>;
>  

Adding this pattern here puts it inside the isEGOrCayman predicate which
means it will only be active on Evergreen and newer.  Even though the
other targets don't support OpenCL at the moment, we should move the
pattern outside this predicate in case we decide to use it with GLSL.

-Tom

>    // SHA-256 Patterns
>    def : SHA256MaPattern <BFI_INT_eg, XOR_INT>;
> -- 
> 1.8.3.1
>