[Mesa-dev] [PATCH 1/4] R600: Use MULADD_IEEE instruction for mad pattern

[Tom Stellard]

On Sat, Feb 02, 2013 at 07:03:00PM +0100, Vincent Lejeune wrote:
> ---

Hi Vincent,

Could you add a test case for this.  Also, if the AMDGPUISD::MAD node
isn't being used anymore, it should be removed.

-Tom
>  lib/Target/R600/AMDGPUISelLowering.cpp | 6 +++---
>  lib/Target/R600/AMDILISelLowering.cpp  | 3 ++-
>  lib/Target/R600/R600Instructions.td    | 8 ++++++++
>  3 files changed, 13 insertions(+), 4 deletions(-)
> 
> diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp
> index f3a047a..40c2f5f 100644
> --- a/lib/Target/R600/AMDGPUISelLowering.cpp
> +++ b/lib/Target/R600/AMDGPUISelLowering.cpp
> @@ -176,9 +176,9 @@ SDValue AMDGPUTargetLowering::LowerIntrinsicLRP(SDValue Op,
>                                  Op.getOperand(1));
>    SDValue OneSubAC = DAG.getNode(ISD::FMUL, DL, VT, OneSubA,
>                                                      Op.getOperand(3));
> -  return DAG.getNode(AMDGPUISD::MAD, DL, VT, Op.getOperand(1),
> -                                               Op.getOperand(2),
> -                                               OneSubAC);
> +  return DAG.getNode(ISD::FADD, DL, VT,
> +      DAG.getNode(ISD::FMUL, DL, VT, Op.getOperand(1), Op.getOperand(2)),
> +      OneSubAC);
>  }
>  
>  /// \brief Generate Min/Max node
> diff --git a/lib/Target/R600/AMDILISelLowering.cpp b/lib/Target/R600/AMDILISelLowering.cpp
> index 8bfd30c..1dd0270 100644
> --- a/lib/Target/R600/AMDILISelLowering.cpp
> +++ b/lib/Target/R600/AMDILISelLowering.cpp
> @@ -451,7 +451,8 @@ AMDGPUTargetLowering::LowerSDIV24(SDValue Op, SelectionDAG &DAG) const {
>    SDValue fqneg = DAG.getNode(ISD::FNEG, DL, FLTTY, fq);
>  
>    // float fr = mad(fqneg, fb, fa);
> -  SDValue fr = DAG.getNode(AMDGPUISD::MAD, DL, FLTTY, fqneg, fb, fa);
> +  SDValue fr = DAG.getNode(ISD::FADD, DL, FLTTY,
> +      DAG.getNode(ISD::MUL, DL, FLTTY, fqneg, fb), fa);
>  
>    // int iq = (int)fq;
>    SDValue iq = DAG.getNode(ISD::FP_TO_SINT, DL, INTTY, fq);
> diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td
> index bcbb5a1..d3cee56 100644
> --- a/lib/Target/R600/R600Instructions.td
> +++ b/lib/Target/R600/R600Instructions.td
> @@ -916,6 +916,12 @@ class MULADD_Common <bits<5> inst> : R600_3OP <
>     (IL_mad R600_Reg32:$src0, R600_Reg32:$src1, R600_Reg32:$src2))]
>  >;
>  
> +class MULADD_IEEE_Common <bits<5> inst> : R600_3OP <
> +  inst, "MULADD_IEEE",
> +  [(set (f32 R600_Reg32:$dst),
> +   (fadd (fmul R600_Reg32:$src0, R600_Reg32:$src1), R600_Reg32:$src2))]
> +>;
> +
>  class CNDE_Common <bits<5> inst> : R600_3OP <
>    inst, "CNDE",
>    [(set R600_Reg32:$dst,
> @@ -1070,6 +1076,7 @@ let Predicates = [isR600] in {
>  
>    def MUL_LIT_r600 : MUL_LIT_Common<0x0C>;
>    def MULADD_r600 : MULADD_Common<0x10>;
> +  def MULADD_IEEE_r600 : MULADD_IEEE_Common<0x14>;
>    def CNDE_r600 : CNDE_Common<0x18>;
>    def CNDGT_r600 : CNDGT_Common<0x19>;
>    def CNDGE_r600 : CNDGE_Common<0x1A>;
> @@ -1209,6 +1216,7 @@ let Predicates = [isEGorCayman] in {
>    >;
>  
>    def MULADD_eg : MULADD_Common<0x14>;
> +  def MULADD_IEEE_eg : MULADD_IEEE_Common<0x18>;
>    def ASHR_eg : ASHR_Common<0x15>;
>    def LSHR_eg : LSHR_Common<0x16>;
>    def LSHL_eg : LSHL_Common<0x17>;
> -- 
> 1.8.1
> 
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