[Mesa-dev] [PATCH 2/4] R600: Do not fold modifier/litterals in vector inst

[Tom Stellard]

On Sat, Feb 02, 2013 at 07:03:01PM +0100, Vincent Lejeune wrote:
> This fixes a couple of regressions on (probably not just) cayman
> ---
>  lib/Target/R600/AMDILISelDAGToDAG.cpp | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

> 
> diff --git a/lib/Target/R600/AMDILISelDAGToDAG.cpp b/lib/Target/R600/AMDILISelDAGToDAG.cpp
> index 84223f6..7fc3a2f 100644
> --- a/lib/Target/R600/AMDILISelDAGToDAG.cpp
> +++ b/lib/Target/R600/AMDILISelDAGToDAG.cpp
> @@ -229,7 +229,9 @@ SDNode *AMDGPUDAGToDAGISel::Select(SDNode *N) {
>              continue;
>            }
>        } else {
> -        if (!TII->isALUInstr(Use->getMachineOpcode())) {
> +        if (!TII->isALUInstr(Use->getMachineOpcode()) ||
> +            (TII->get(Use->getMachineOpcode()).TSFlags &
> +            R600_InstFlag::VECTOR)) {
>            continue;
>          }
>  
> @@ -272,7 +274,8 @@ SDNode *AMDGPUDAGToDAGISel::Select(SDNode *N) {
>    if (ST.device()->getGeneration() <= AMDGPUDeviceInfo::HD6XXX) {
>      const R600InstrInfo *TII =
>          static_cast<const R600InstrInfo*>(TM.getInstrInfo());
> -    if (Result && Result->isMachineOpcode()
> +    if (Result && Result->isMachineOpcode() &&
> +        !(TII->get(Result->getMachineOpcode()).TSFlags & R600_InstFlag::VECTOR)
>          && TII->isALUInstr(Result->getMachineOpcode())) {
>        // Fold FNEG/FABS/CONST_ADDRESS
>        // TODO: Isel can generate multiple MachineInst, we need to recursively
> -- 
> 1.8.1
> 
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