[Mesa-dev] [PATCH V3 18/19] i965/fs: add support for ir_txf_ms on Gen6+

[Eric Anholt]

Chris Forbes <chrisf at ijw.co.nz> writes:

> On Gen6, lower this to `ld` with lod=0 and an extra sample_index
> parameter.
>
> On Gen7, use `ld2dms`. We don't support CMS yet for multisample
> textures, so we just hardcode MCS=0. This is ignored for IMS and UMS
> surfaces.
>
> Note: If we do end up emitting specialized shaders based on the MSAA
> layout, we can emit a slightly shorter message here in the UMS case.
>
> Note: According to the PRM, `ld2dms` takes one more parameter, lod.
> However, it's always zero, and including it would make the message too
> long for SIMD16, so we just omit it.
>
> V2: Reworked completely, added support for Gen7.
> V3: - Introduce sample_index parameter rather than reusing lod
>     - Removed spurious whitespace change
>     - Clarify commit message
>
> Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>


> @@ -1176,10 +1186,29 @@ fs_visitor::emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate,
>  	 mlen += reg_width;
>        }
>        break;
> +   case ir_txf_ms:
> +      emit(MOV(fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_UD), sample_index));
> +      mlen += reg_width;
> +
> +      /* constant zero MCS; we arrange to never actually have a compressed
> +       * multisample surface here for now. TODO: issue ld_mcs to get this first,
> +       * if we ever support texturing from compressed multisample surfaces */

We stick the closing of multiline comments on a separate line.

> +      emit(MOV(fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_UD), fs_reg(0u)));
> +      mlen += reg_width;
> +
> +      /* there is no offsetting for this message; just copy in the integer
> +       * texture coordinates */

same

> +      for (int i=0; i < ir->coordinate->type->vector_elements; i++) {

spaces around '='

> +         emit(MOV(fs_reg(MRF, base_mrf + mlen, BRW_REGISTER_TYPE_D),
> +                  coordinate));
> +         coordinate.reg_offset++;
> +         mlen += reg_width;
> +      }
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