[Mesa-dev] [PATCH 09/12] R600/SI: replace AllReg_* with [SV]Src_*

[Christian König]

Am 12.02.2013 21:49, schrieb Michel Dänzer:
> On Die, 2013-02-12 at 18:13 +0100, Christian König wrote:
>> From: Christian König <christian.koenig at amd.com>
>>
>> Mark all the operands that can also have an immediate.
>>
>> Signed-off-by: Christian König <christian.koenig at amd.com>
>> ---
>>   lib/Target/R600/SIInstrFormats.td |   32 +++++-----
>>   lib/Target/R600/SIInstructions.td |  128 ++++++++++++++++++-------------------
>>   lib/Target/R600/SIRegisterInfo.td |   10 ++-
>>   3 files changed, 87 insertions(+), 83 deletions(-)
>>
>> diff --git a/lib/Target/R600/SIInstrFormats.td b/lib/Target/R600/SIInstrFormats.td
>> index a7a3558..473d3dc 100644
>> --- a/lib/Target/R600/SIInstrFormats.td
>> +++ b/lib/Target/R600/SIInstrFormats.td
>> @@ -22,25 +22,25 @@
>>   //===----------------------------------------------------------------------===//
>>   
>>   class VOP3_32 <bits<9> op, string opName, list<dag> pattern>
>> -  : VOP3 <op, (outs VReg_32:$dst), (ins AllReg_32:$src0, VReg_32:$src1, VReg_32:$src2, i32imm:$src3, i32imm:$src4, i32imm:$src5, i32imm:$src6), opName, pattern>;
>> +  : VOP3 <op, (outs VReg_32:$dst), (ins VSrc_32:$src0, VReg_32:$src1, VReg_32:$src2, i32imm:$src3, i32imm:$src4, i32imm:$src5, i32imm:$src6), opName, pattern>;
> Note that I think all source operands can use inline constants, even
> several different ones. Also, the same SGPR can be used for several
> source operands. The only limitation is that at most one actual SGPR or
> literal constant can be used by the VALU. Not sure how to model the
> latter more accurately, but I think the former might be relatively
> straightforward.

Yeah agree. My idea is that we handle the constraints (only one literal 
or SGPR in a VOP* encoding) after the initial selection, e.g. change 
VOP3 to have three VSrc_* operands and in a post selection pass pull in 
the inline constants and handle multiple SGPR/literals.

> BTW, please rebase this series on top of the output modifier fix I
> pushed to the LLVM trunk, it added a couple more uses of SREG_LIT_0,
> which I'm not sure how to properly merge with your changes.

Which repository is that? I'm currently still working on Toms 
(git://people.freedesktop.org/~tstellar/llvm) master branch.

> P.S. I noticed this warning that isn't there without your series:
>
> ..../lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp: In member function ‘virtual void {anonymous}::SIMCCodeEmitter::EncodeInstruction(const llvm::MCInst&, llvm::raw_ostream&, llvm::SmallVectorImpl<llvm::MCFixup>&) const’:
> ..../lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp:174:53: warning: ‘Imm.{anonymous}::IntFloatUnion::F’ may be used uninitialized in this function [-Wmaybe-uninitialized]
>
> I guess it can't tell that one of the union members will always be
> initialized. Maybe convert
>
>      else if (Op.isFPImm())
>        Imm.F = Op.getFPImm();
>
> to something like
>
>      else {
>        assert(Op.isFPImm());
>        Imm.F = Op.getFPImm();
>      }
>

Thx, missed that, going to fix it.

Christian.