[Mesa-dev] [PATCH 1/6] R600: Use MUL_IEEE for trig/fdiv intrinsic

[Tom Stellard]

On Mon, Feb 18, 2013 at 05:27:25PM +0100, Vincent Lejeune wrote:

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
> ---
>  lib/Target/R600/R600Instructions.td | 8 ++++----
>  test/CodeGen/R600/fdiv.v4f32.ll     | 8 ++++----
>  2 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td
> index 0a01400..e4cc06e 100644
> --- a/lib/Target/R600/R600Instructions.td
> +++ b/lib/Target/R600/R600Instructions.td
> @@ -1090,12 +1090,12 @@ class COS_Common <bits<11> inst> : R600_1OP <
>  multiclass DIV_Common <InstR600 recip_ieee> {
>  def : Pat<
>    (int_AMDGPU_div R600_Reg32:$src0, R600_Reg32:$src1),
> -  (MUL R600_Reg32:$src0, (recip_ieee R600_Reg32:$src1))
> +  (MUL_IEEE R600_Reg32:$src0, (recip_ieee R600_Reg32:$src1))
>  >;
>  
>  def : Pat<
>    (fdiv R600_Reg32:$src0, R600_Reg32:$src1),
> -  (MUL R600_Reg32:$src0, (recip_ieee R600_Reg32:$src1))
> +  (MUL_IEEE R600_Reg32:$src0, (recip_ieee R600_Reg32:$src1))
>  >;
>  }
>  
> @@ -1169,12 +1169,12 @@ let Predicates = [isR600] in {
>  // cards.
>  class COS_PAT <InstR600 trig> : Pat<
>    (fcos R600_Reg32:$src),
> -  (trig (MUL (MOV_IMM_I32 CONST.TWO_PI_INV), R600_Reg32:$src))
> +  (trig (MUL_IEEE (MOV_IMM_I32 CONST.TWO_PI_INV), R600_Reg32:$src))
>  >;
>  
>  class SIN_PAT <InstR600 trig> : Pat<
>    (fsin R600_Reg32:$src),
> -  (trig (MUL (MOV_IMM_I32 CONST.TWO_PI_INV), R600_Reg32:$src))
> +  (trig (MUL_IEEE (MOV_IMM_I32 CONST.TWO_PI_INV), R600_Reg32:$src))
>  >;
>  
>  //===----------------------------------------------------------------------===//
> diff --git a/test/CodeGen/R600/fdiv.v4f32.ll b/test/CodeGen/R600/fdiv.v4f32.ll
> index b013fd6..459fd11 100644
> --- a/test/CodeGen/R600/fdiv.v4f32.ll
> +++ b/test/CodeGen/R600/fdiv.v4f32.ll
> @@ -1,13 +1,13 @@
>  ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
>  
>  ;CHECK: RECIP_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> -;CHECK: MUL NON-IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> +;CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
>  ;CHECK: RECIP_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> -;CHECK: MUL NON-IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> +;CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
>  ;CHECK: RECIP_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> -;CHECK: MUL NON-IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> +;CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
>  ;CHECK: RECIP_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> -;CHECK: MUL NON-IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> +;CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
>  
>  define void @test(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
>    %b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1
> -- 
> 1.8.1.2
> 
> _______________________________________________
> mesa-dev mailing list
> mesa-dev at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev