[Mesa-dev] [PATCH 3/6] R600: Turn BUILD_VECTOR into Reg_Sequence

[Tom Stellard]

On Mon, Feb 18, 2013 at 05:27:27PM +0100, Vincent Lejeune wrote:

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
> ---
>  lib/Target/R600/AMDILISelDAGToDAG.cpp | 29 +++++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git a/lib/Target/R600/AMDILISelDAGToDAG.cpp b/lib/Target/R600/AMDILISelDAGToDAG.cpp
> index 2e726e9..6b24117 100644
> --- a/lib/Target/R600/AMDILISelDAGToDAG.cpp
> +++ b/lib/Target/R600/AMDILISelDAGToDAG.cpp
> @@ -160,6 +160,35 @@ SDNode *AMDGPUDAGToDAGISel::Select(SDNode *N) {
>    }
>    switch (Opc) {
>    default: break;
> +  case ISD::BUILD_VECTOR: {
> +    const AMDGPUSubtarget &ST = TM.getSubtarget<AMDGPUSubtarget>();
> +    if (ST.device()->getGeneration() > AMDGPUDeviceInfo::HD6XXX) {
> +      break;
> +    }
> +    // BUILD_VECTOR is usually lowered into an IMPLICIT_DEF + 4 INSERT_SUBREG
> +    // that adds a 128 bits reg copy when going through TwoAddressInstructions
> +    // pass. We want to avoid 128 bits copies as much as possible because they
> +    // can't be bundled by our scheduler.
> +    SDValue RegSeqArgs[9] = {
> +      CurDAG->getTargetConstant(AMDGPU::R600_Reg128RegClassID, MVT::i32),
> +      SDValue(), CurDAG->getTargetConstant(AMDGPU::sub0, MVT::i32),
> +      SDValue(), CurDAG->getTargetConstant(AMDGPU::sub1, MVT::i32),
> +      SDValue(), CurDAG->getTargetConstant(AMDGPU::sub2, MVT::i32),
> +      SDValue(), CurDAG->getTargetConstant(AMDGPU::sub3, MVT::i32)
> +    };
> +    bool IsRegSeq = true;
> +    for (unsigned i = 0; i < N->getNumOperands(); i++) {
> +      if (dyn_cast<RegisterSDNode>(N->getOperand(i))) {
> +        IsRegSeq = false;
> +        break;
> +      }
> +      RegSeqArgs[2 * i + 1] = N->getOperand(i);
> +    }
> +    if (!IsRegSeq)
> +      break;
> +    return CurDAG->SelectNodeTo(N, AMDGPU::REG_SEQUENCE, N->getVTList(),
> +        RegSeqArgs, 2 * N->getNumOperands() + 1);
> +  }
>    case ISD::ConstantFP:
>    case ISD::Constant: {
>      const AMDGPUSubtarget &ST = TM.getSubtarget<AMDGPUSubtarget>();
> -- 
> 1.8.1.2
> 
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