[Mesa-dev] [PATCH 02/14] R600/SI: add constant for inline zero operand
Christian König
deathsimple at vodafone.de
Wed Feb 20 09:46:48 PST 2013
From: Christian König <christian.koenig at amd.com>
Signed-off-by: Christian König <christian.koenig at amd.com>
---
lib/Target/R600/SIInstrInfo.td | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td
index cf0d5b9..8b90d45 100644
--- a/lib/Target/R600/SIInstrInfo.td
+++ b/lib/Target/R600/SIInstrInfo.td
@@ -49,9 +49,8 @@ class InlineImm <ValueType vt> : ImmLeaf <vt, [{
// SI assembler operands
//===----------------------------------------------------------------------===//
-class SIOperand <ValueType vt, dag opInfo>: Operand <vt> {
- let EncoderMethod = "encodeOperand";
- let MIOperandInfo = opInfo;
+def SIOperand {
+ int ZERO = 0x80;
}
class GPR4Align <RegisterClass rc> : Operand <vAny> {
@@ -201,7 +200,7 @@ multiclass VOPC_Helper <bits<8> op, RegisterClass vrc, RegisterClass arc,
InstFlag:$omod, InstFlag:$neg),
opName, pattern
> {
- let SRC2 = 0x80;
+ let SRC2 = SIOperand.ZERO;
}
}
--
1.7.10.4
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