[Mesa-dev] [PATCH 4/4] R600/SI: Support AMDGPU.ddx/y intrinsics
Michel Dänzer
michel at daenzer.net
Fri Feb 22 08:56:13 PST 2013
On Fre, 2013-02-22 at 17:44 +0100, Tom Stellard wrote:
> This patch has my r-b, [...]
Thanks.
> > + // Get this thread's ID
> > + BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_MBCNT_LO_U32_B32_e64), mbcnt_lo)
> > + .addImm(0xffffffff)
> > + .addImm(0x80) // Inline constant 0
> > + .addImm(0)
> > + .addImm(0)
> > + .addImm(0)
> > + .addImm(0);
> > + BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_MBCNT_HI_U32_B32_e32), mbcnt)
> > + .addImm(0xffffffff)
> > + .addReg(mbcnt_lo);
> > +
> > + // Multiply by 4 to get a DWORD offset
> > + BuildMI(BB, I, BB.findDebugLoc(I), TII->get(AMDGPU::V_LSHL_B32_e64), tid)
> > + .addReg(mbcnt)
> > + .addImm(0x82) // Inline constant 2
>
> One downside of the recent literal changes is that we must use
> the magic numbers everywhere. Representing inline constants as registers was
> convenient, because it would give as an enum that we could use in both the .td
> files and the .cpp code. Perhaps we could revisit using registers for inline
> constants?
See my earlier discussion with Christian about that. The ideal solution
would be that we can just specify normal immediates for any source
operand, and it automagically uses an inline constant, a literal or a
temporary register as appropriate. It sounded like Christian is getting
close to that.
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Debian, X and DRI developer
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