[Mesa-dev] [RFC 04/13] i965: support for reserving surfaces for planar textures

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_vs.c         |   22 +++++++++++++++++----
 src/mesa/drivers/dri/i965/brw_wm.c         |   25 +++++++++++++++++++-----
 src/mesa/drivers/dri/intel/intel_tex_obj.h |   29 ++++++++++++++++++++++++++++
 3 files changed, 67 insertions(+), 9 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index 0d6d60b..3eb0d7c 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -205,7 +205,10 @@ brw_vs_prog_data_compare(const void *in_a, const void *in_b,
    return true;
 }
 
-static void brw_vs_surf_setup(GLbitfield samplers,
+static bool brw_vs_surf_setup(GLbitfield samplers,
+                              const GLubyte *samplers_units,
+                              const GLbitfield *textures_used,
+                              const struct gl_texture_unit *units,
                               uint32_t *sampler_to_surf_state_start)
 {
    unsigned num_samplers = _mesa_fls(samplers);
@@ -213,9 +216,16 @@ static void brw_vs_surf_setup(GLbitfield samplers,
 
    for (unsigned s = 0; s < num_samplers; s++) {
       if (samplers & (1 << s)) {
-         sampler_to_surf_state_start[s] = SURF_INDEX_VS_TEXTURE(surf_index++);
+         sampler_to_surf_state_start[s] = SURF_INDEX_VS_TEXTURE(surf_index);
+         surf_index += resolve_hw_surf_num(units, textures_used,
+                          samplers_units[s]);
+
+         if (surf_index > SURF_INDEX_VS_TEXTURE(BRW_MAX_TEX_UNIT))
+            return false;
       }
    }
+
+   return true;
 }
 
 static bool
@@ -291,8 +301,12 @@ do_vs_prog(struct brw_context *brw,
 			       true);
    }
 
-   brw_vs_surf_setup(c.vp->program.Base.SamplersUsed,
-      c.vp->sampler_to_surf_state_start);
+   if (!brw_vs_surf_setup(c.vp->program.Base.SamplersUsed,
+			 c.vp->program.Base.SamplerUnits,
+			 c.vp->program.Base.TexturesUsed,
+			 brw->intel.ctx.Texture.Unit,
+			 c.vp->sampler_to_surf_state_start))
+      return false;
 
    /* Emit GEN4 code.
     */
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 05b4e68..8584e3f 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -130,16 +130,27 @@ brw_wm_prog_data_free(const void *in_prog_data)
    ralloc_free((void *)prog_data->pull_param);
 }
 
-static void brw_wm_fs_surf_setup(GLbitfield samplers,
+static bool brw_wm_fs_surf_setup(GLbitfield samplers,
+                                 const GLubyte *samplers_units,
+                                 const GLbitfield *textures_used,
+                                 const struct gl_texture_unit *units,
                                  uint32_t *sampler_to_surf_state_start)
 {
    unsigned num_samplers = _mesa_fls(samplers);
    unsigned surf_index = 0;
 
    for (unsigned s = 0; s < num_samplers; s++) {
-      if (samplers & (1 << s))
-         sampler_to_surf_state_start[s] = SURF_INDEX_TEXTURE(surf_index++);
+      if (samplers & (1 << s)) {
+         sampler_to_surf_state_start[s] = SURF_INDEX_TEXTURE(surf_index);
+         surf_index += resolve_hw_surf_num(units, textures_used,
+	                  samplers_units[s]);
+
+         if (surf_index > SURF_INDEX_TEXTURE(BRW_MAX_TEX_UNIT))
+            return false;
+      }
    }
+
+   return true;
 }
 
 /**
@@ -184,8 +195,12 @@ bool do_wm_prog(struct brw_context *brw,
       brw_compute_barycentric_interp_modes(brw, c->key.flat_shade,
                                            &fp->program);
 
-   brw_wm_fs_surf_setup(fp->program.Base.SamplersUsed,
-                        fp->sampler_to_surf_state_start);
+   if (!brw_wm_fs_surf_setup(fp->program.Base.SamplersUsed,
+                             fp->program.Base.SamplerUnits,
+                             fp->program.Base.TexturesUsed,
+                             brw->intel.ctx.Texture.Unit,
+                             fp->sampler_to_surf_state_start))
+      return false;
 
    program = brw_wm_fs_emit(brw, c, &fp->program, prog, &program_size);
    if (program == NULL)
diff --git a/src/mesa/drivers/dri/intel/intel_tex_obj.h b/src/mesa/drivers/dri/intel/intel_tex_obj.h
index c724dbb..36cfdf4 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_obj.h
+++ b/src/mesa/drivers/dri/intel/intel_tex_obj.h
@@ -29,6 +29,7 @@
 #define _INTEL_TEX_OBJ_H
 
 #include "swrast/s_context.h"
+#include "intel_regions.h"
 
 
 struct intel_texture_object
@@ -81,6 +82,34 @@ struct intel_texture_image
    uint32_t ext_offsets[3];
 };
 
+/** Use specifically the format of the first image as this is set directly based
+ *  on the format of "__DRIimage" representing the external surface:
+ *  (see intel_image_target_texture_2d() and intel_set_texture_image_region()).
+ */
+static INLINE unsigned
+resolve_hw_surf_num(const struct gl_texture_unit *units, const GLbitfield *used,
+                    unsigned unit)
+{
+   const struct intel_texture_image *intel_img;
+   const struct gl_texture_object *tex_obj;
+
+   /** Only external textures may require more than one surface */
+   if (!(used[unit] & (1 << TEXTURE_EXTERNAL_INDEX)))
+      return 1;
+
+   tex_obj = units[unit].CurrentTex[TEXTURE_EXTERNAL_INDEX];
+   assert(tex_obj->Target == GL_TEXTURE_EXTERNAL_OES);
+
+   intel_img = (const struct intel_texture_image *)
+      tex_obj->Image[0][tex_obj->BaseLevel];
+
+   /** Assume one surface as no images are bound yet */
+   if (!intel_img)
+      return 1;
+
+   return intel_img->ext_format ? intel_img->ext_format->nplanes : 1;
+}
+
 static INLINE struct intel_texture_object *
 intel_texture_object(struct gl_texture_object *obj)
 {
-- 
1.7.9.5