[Mesa-dev] [RFC 07/13] i965: refactor sampling engine surface state setup

Topi Pohjolainen topi.pohjolainen at intel.com
Tue Feb 26 05:18:58 PST 2013


This prepares for image external textures having multiple planes
and hence calling for one to set up more than one surface per
texture.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  |   90 ++++++++-------
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |  124 ++++++++++++---------
 2 files changed, 119 insertions(+), 95 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index a65752e..649d988 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -836,57 +836,37 @@ brw_update_buffer_texture_surface(struct gl_context *ctx,
 }
 
 static void
-brw_update_texture_surface(struct gl_context *ctx,
-                           unsigned unit,
-                           uint32_t *binding_table,
-                           unsigned surf_index)
+brw_update_texture_component(struct brw_context *brw,
+                             uint32_t *binding_table_slot,
+                             const struct intel_mipmap_tree *mt,
+                             unsigned width, unsigned height,
+                             unsigned depth, unsigned stride,
+                             GLuint target, GLuint tex_format,
+                             uint32_t offset, uint32_t levels)
 {
-   struct intel_context *intel = intel_context(ctx);
-   struct brw_context *brw = brw_context(ctx);
-   struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
-   struct intel_texture_object *intelObj = intel_texture_object(tObj);
-   struct intel_mipmap_tree *mt = intelObj->mt;
-   struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
-   struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
-   uint32_t *surf;
-   int width, height, depth;
    uint32_t tile_x, tile_y;
+   const struct intel_region *region = mt->region;
+   uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
+                                    6 * 4, 32, binding_table_slot);
 
-   if (tObj->Target == GL_TEXTURE_BUFFER) {
-      brw_update_buffer_texture_surface(ctx, unit, binding_table, surf_index);
-      return;
-   }
-
-   intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth);
-
-   surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
-			  6 * 4, 32, &binding_table[surf_index]);
-
-   surf[0] = (translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
+   surf[0] = (target << BRW_SURFACE_TYPE_SHIFT |
 	      BRW_SURFACE_MIPMAPLAYOUT_BELOW << BRW_SURFACE_MIPLAYOUT_SHIFT |
 	      BRW_SURFACE_CUBEFACE_ENABLES |
-	      (translate_tex_format(intel,
-                                    mt->format,
-				    firstImage->InternalFormat,
-				    tObj->DepthMode,
-				    sampler->sRGBDecode) <<
-	       BRW_SURFACE_FORMAT_SHIFT));
+	      (tex_format << BRW_SURFACE_FORMAT_SHIFT));
 
-   surf[1] = intelObj->mt->region->bo->offset + intelObj->mt->offset; /* reloc */
+   surf[1] = region->bo->offset + offset;
 
-   surf[2] = ((intelObj->_MaxLevel - tObj->BaseLevel) << BRW_SURFACE_LOD_SHIFT |
+   surf[2] = (levels << BRW_SURFACE_LOD_SHIFT |
 	      (width - 1) << BRW_SURFACE_WIDTH_SHIFT |
 	      (height - 1) << BRW_SURFACE_HEIGHT_SHIFT);
 
-   surf[3] = (brw_get_surface_tiling_bits(intelObj->mt->region->tiling) |
+   surf[3] = (brw_get_surface_tiling_bits(region->tiling) |
 	      (depth - 1) << BRW_SURFACE_DEPTH_SHIFT |
-	      (intelObj->mt->region->pitch - 1) <<
-	      BRW_SURFACE_PITCH_SHIFT);
+	      (stride - 1) << BRW_SURFACE_PITCH_SHIFT);
 
    surf[4] = 0;
 
-   intel_miptree_get_tile_offsets(intelObj->mt, firstImage->Level, 0,
-                                  &tile_x, &tile_y);
+   intel_miptree_get_tile_offsets(mt, 0, 0, &tile_x, &tile_y);
    assert(brw->has_surface_tile_offset || (tile_x == 0 && tile_y == 0));
    /* Note that the low bits of these fields are missing, so
     * there's the possibility of getting in trouble.
@@ -899,12 +879,42 @@ brw_update_texture_surface(struct gl_context *ctx,
 
    /* Emit relocation to surface contents */
    drm_intel_bo_emit_reloc(brw->intel.batch.bo,
-			   binding_table[surf_index] + 4,
-			   intelObj->mt->region->bo,
-                           intelObj->mt->offset,
+			   *binding_table_slot + 4,
+			   region->bo,
+                           offset,
 			   I915_GEM_DOMAIN_SAMPLER, 0);
 }
 
+static void
+brw_update_texture_surface(struct gl_context *ctx,
+                           unsigned unit,
+                           uint32_t *binding_table,
+                           unsigned surf_index)
+{
+   struct brw_context *brw = brw_context(ctx);
+   struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
+   struct intel_texture_object *intelObj = intel_texture_object(tObj);
+   struct intel_mipmap_tree *mt = intelObj->mt;
+   struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
+   struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
+   int width, height, depth;
+
+   if (tObj->Target == GL_TEXTURE_BUFFER) {
+      brw_update_buffer_texture_surface(ctx, unit, binding_table, surf_index);
+      return;
+   }
+
+   intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth);
+
+   brw_update_texture_component(brw, binding_table + surf_index,
+      mt, width, height, depth, mt->region->pitch,
+      translate_tex_target(tObj->Target),
+      translate_tex_format(intel_context(ctx), mt->format,
+         firstImage->InternalFormat, tObj->DepthMode, sampler->sRGBDecode),
+      mt->offset,
+      intelObj->_MaxLevel - tObj->BaseLevel);
+}
+
 /**
  * Create the constant buffer surface.  Vertex/fragment shader constants will be
  * read from this buffer with Data Port Read instructions/messages.
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index d53df20..b6cf4d9 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -279,45 +279,23 @@ gen7_update_buffer_texture_surface(struct gl_context *ctx,
 }
 
 static void
-gen7_update_texture_surface(struct gl_context *ctx,
-                            unsigned unit,
-                            uint32_t *binding_table,
-                            unsigned surf_index)
+gen7_update_texture_component(struct brw_context *brw,
+                              uint32_t *binding_table_slot,
+                              const struct intel_mipmap_tree *mt,
+                              unsigned width, unsigned height,
+                              unsigned depth, unsigned stride,
+                              GLenum target, GLuint tex_format,
+                              uint32_t offset, uint32_t levels, int swizzle)
 {
-   struct brw_context *brw = brw_context(ctx);
-   struct intel_context *intel = &brw->intel;
-   struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
-   struct intel_texture_object *intelObj = intel_texture_object(tObj);
-   struct intel_mipmap_tree *mt = intelObj->mt;
-   struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
-   struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
-   int width, height, depth;
    uint32_t tile_x, tile_y;
-
-   if (tObj->Target == GL_TEXTURE_BUFFER) {
-      gen7_update_buffer_texture_surface(ctx, unit, binding_table, surf_index);
-      return;
-   }
-
-   /* We don't support MSAA for textures. */
-   assert(!mt->array_spacing_lod0);
-   assert(mt->num_samples <= 1);
-
-   intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth);
-
+   const struct intel_region *region = mt->region;
    uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
-                                    8 * 4, 32, &binding_table[surf_index]);
+                                    8 * 4, 32, binding_table_slot);
    memset(surf, 0, 8 * 4);
 
-   uint32_t tex_format = translate_tex_format(intel,
-                                              mt->format,
-                                              firstImage->InternalFormat,
-                                              tObj->DepthMode,
-                                              sampler->sRGBDecode);
-
-   surf[0] = translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
+   surf[0] = translate_tex_target(target) << BRW_SURFACE_TYPE_SHIFT |
              tex_format << BRW_SURFACE_FORMAT_SHIFT |
-             gen7_surface_tiling_mode(mt->region->tiling) |
+             gen7_surface_tiling_mode(region->tiling) |
              BRW_SURFACE_CUBEFACE_ENABLES;
 
    if (mt->align_h == 4)
@@ -325,18 +303,16 @@ gen7_update_texture_surface(struct gl_context *ctx,
    if (mt->align_w == 8)
       surf[0] |= GEN7_SURFACE_HALIGN_8;
 
-   if (depth > 1 && tObj->Target != GL_TEXTURE_3D)
+   if (depth > 1 && target != GL_TEXTURE_3D)
       surf[0] |= GEN7_SURFACE_IS_ARRAY;
 
-   surf[1] = mt->region->bo->offset + mt->offset; /* reloc */
+   surf[1] = region->bo->offset + offset;
 
    surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) |
              SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT);
-   surf[3] = SET_FIELD(depth - 1, BRW_SURFACE_DEPTH) |
-             ((intelObj->mt->region->pitch) - 1);
+   surf[3] = SET_FIELD(depth - 1, BRW_SURFACE_DEPTH) | (stride - 1);
 
-   intel_miptree_get_tile_offsets(intelObj->mt, firstImage->Level, 0,
-                                  &tile_x, &tile_y);
+   intel_miptree_get_tile_offsets(mt, 0, 0, &tile_x, &tile_y);
    assert(brw->has_surface_tile_offset || (tile_x == 0 && tile_y == 0));
    /* Note that the low bits of these fields are missing, so
     * there's the possibility of getting in trouble.
@@ -344,20 +320,9 @@ gen7_update_texture_surface(struct gl_context *ctx,
    surf[5] = ((tile_x / 4) << BRW_SURFACE_X_OFFSET_SHIFT |
               (tile_y / 2) << BRW_SURFACE_Y_OFFSET_SHIFT |
               /* mip count */
-              (intelObj->_MaxLevel - tObj->BaseLevel));
-
-   if (intel->is_haswell) {
-      /* Handling GL_ALPHA as a surface format override breaks 1.30+ style
-       * texturing functions that return a float, as our code generation always
-       * selects the .x channel (which would always be 0).
-       */
-      const bool alpha_depth = tObj->DepthMode == GL_ALPHA &&
-         (firstImage->_BaseFormat == GL_DEPTH_COMPONENT ||
-          firstImage->_BaseFormat == GL_DEPTH_STENCIL);
-
-      const int swizzle = unlikely(alpha_depth)
-         ? SWIZZLE_XYZW : brw_get_texture_swizzle(ctx, tObj);
+              levels);
 
+   if (brw->intel.is_haswell) {
       surf[7] =
          SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 0)), GEN7_SURFACE_SCS_R) |
          SET_FIELD(swizzle_to_scs(GET_SWZ(swizzle, 1)), GEN7_SURFACE_SCS_G) |
@@ -367,13 +332,62 @@ gen7_update_texture_surface(struct gl_context *ctx,
 
    /* Emit relocation to surface contents */
    drm_intel_bo_emit_reloc(brw->intel.batch.bo,
-			   binding_table[surf_index] + 4,
-			   intelObj->mt->region->bo, intelObj->mt->offset,
-			   I915_GEM_DOMAIN_SAMPLER, 0);
+                           *binding_table_slot + 4,
+                           region->bo, offset,
+                           I915_GEM_DOMAIN_SAMPLER, 0);
 
    gen7_check_surface_setup(surf, false /* is_render_target */);
 }
 
+static void
+gen7_update_texture_surface(struct gl_context *ctx,
+                            unsigned unit,
+                            uint32_t *binding_table,
+                            unsigned surf_index)
+{
+   struct brw_context *brw = brw_context(ctx);
+   struct intel_context *intel = &brw->intel;
+   struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
+   struct intel_texture_object *intelObj = intel_texture_object(tObj);
+   struct intel_mipmap_tree *mt = intelObj->mt;
+   struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel];
+   struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
+   int width, height, depth;
+   int swizzle = 0;
+
+   if (tObj->Target == GL_TEXTURE_BUFFER) {
+      gen7_update_buffer_texture_surface(ctx, unit, binding_table, surf_index);
+      return;
+   }
+
+   /* We don't support MSAA for textures. */
+   assert(!mt->array_spacing_lod0);
+   assert(mt->num_samples <= 1);
+
+   intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth);
+
+   if (intel->is_haswell) {
+      /* Handling GL_ALPHA as a surface format override breaks 1.30+ style
+       * texturing functions that return a float, as our code generation always
+       * selects the .x channel (which would always be 0).
+       */
+      const bool alpha_depth = tObj->DepthMode == GL_ALPHA &&
+         (firstImage->_BaseFormat == GL_DEPTH_COMPONENT ||
+          firstImage->_BaseFormat == GL_DEPTH_STENCIL);
+
+      swizzle =
+         unlikely(alpha_depth) ? SWIZZLE_XYZW :
+         brw_get_texture_swizzle(ctx, tObj);
+   }
+
+   gen7_update_texture_component(brw, binding_table + surf_index,
+      mt, width, height, depth, mt->region->pitch, tObj->Target,
+      translate_tex_format(intel, mt->format, firstImage->InternalFormat,
+         tObj->DepthMode, sampler->sRGBDecode),
+      mt->offset,
+      intelObj->_MaxLevel - tObj->BaseLevel, swizzle);
+}
+
 /**
  * Create the constant buffer surface.  Vertex/fragment shader constants will
  * be read from this buffer with Data Port Read instructions/messages.
-- 
1.7.9.5



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