[Mesa-dev] [PATCH 6/9] i965/fs: Use the LRP instruction for ir_triop_lrp when possible.

[Matt Turner]

On Tue, Feb 26, 2013 at 9:51 AM, Kenneth Graunke <kenneth at whitecape.org> wrote:
>> diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
>> b/src/mesa/drivers/dri/i965/brw_shader.cpp
>> index 9ab18cc..6965d72 100644
>> --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
>> +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
>> @@ -156,7 +156,7 @@ brw_link_shader(struct gl_context *ctx, struct
>> gl_shader_program *shProg)
>>                          SUB_TO_ADD_NEG |
>>                          EXP_TO_EXP2 |
>>                          LOG_TO_LOG2 |
>> -                        LRP_TO_ARITH);
>> +                        (stage == MESA_SHADER_FRAGMENT ? 0 :
>> LRP_TO_ARITH));
>
>
> Doesn't this need to include a gen check as well?  Perhaps:

Not really, since emit_lrp() has a gen check (and has to have it,
since emit_lrp() will be used for fragment program's OPCODE_LRP). For
GLSL, do we gain anything by lowering LRP on gen < 6 in the compiler
vs the backend, or vice versa?

> const int lrp_to_arith = 0;
> if (intel->gen < 6 || stage != MESA_SHADER_FRAGMENT)
>     lrp_to_arith = LRP_TO_ARITH;
>
> then use lrp_to_arith here.