[Mesa-dev] [PATCH 04/12] i965: Add level, layer members to brw_blorp_mip_info

[Chad Versace]

These will later be used to determine if hiz is enabled for the given
slice via intel_miptree_slice_has_hiz().

Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp.cpp |  2 ++
 src/mesa/drivers/dri/i965/brw_blorp.h   | 10 ++++++++++
 2 files changed, 12 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 5f72b5d..88a1a82 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -50,6 +50,8 @@ brw_blorp_mip_info::set(struct intel_mipmap_tree *mt,
    intel_miptree_check_level_layer(mt, level, layer);
 
    this->mt = mt;
+   this->level = level;
+   this->layer = layer;
    this->width = mt->level[level].width;
    this->height = mt->level[level].height;
 
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index 79a3f3a..595528b 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -69,6 +69,16 @@ public:
    struct intel_mipmap_tree *mt;
 
    /**
+    * The miplevel to be used.
+    */
+   uint32_t level;
+
+   /**
+    * Layer of the miplevel to be used.
+    */
+   uint32_t layer;
+
+   /**
     * Width of the miplevel to be used.  For surfaces using
     * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
     */
-- 
1.8.1.2