[Mesa-dev] [PATCH 10/12] i965: Push stencil alignment w/a down to brw_miptree_layout()

[Chad Versace]

Miptree creation has a workaround for separate stencil buffers.  After the
layout is created, we override the tiling to I915_NONE and align it 64x64,
the size of a W-tile.

Before this patch, the workaround occurs in an odd place:
intel_miptree_create(). After brw_miptree_layout() creates the layout,
intel_miptree_create() overrides the tiling and alignment as needed.

Rather than override something after it has been set, it's safer to just
set it correctly in the first place. To do that, this patch pushes down
the workaround into brw_miptree_layout().

Signed-off-by: Chad Versace <chad.versace at linux.intel.com>
---
 src/mesa/drivers/dri/i965/brw_tex_layout.c     |  7 +++++++
 src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 14 ++------------
 2 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 1428396..633e598 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -184,6 +184,13 @@ brw_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree *mt)
       }
       break;
    }
+
+   if (mt->format == MESA_FORMAT_S8) {
+      /* Align to the size of a W tile, 64x64. */
+      mt->total_width = ALIGN(mt->total_width, 64);
+      mt->total_height = ALIGN(mt->total_height, 64);
+   }
+
    DBG("%s: %dx%dx%d\n", __FUNCTION__,
        mt->total_width, mt->total_height, mt->cpp);
 }
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index e3eae11..77923d7 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -397,7 +397,6 @@ intel_miptree_create(struct intel_context *intel,
                      bool force_y_tiling)
 {
    struct intel_mipmap_tree *mt;
-   GLuint total_width, total_height;
    gl_format mt_format, etc_format;
 
    intel_miptree_select_formats(format, &mt_format, &etc_format);
@@ -413,23 +412,14 @@ intel_miptree_create(struct intel_context *intel,
       return NULL;
    }
 
-   total_width = mt->total_width;
-   total_height = mt->total_height;
-
-   if (format == MESA_FORMAT_S8) {
-      /* Align to size of W tile, 64x64. */
-      total_width = ALIGN(total_width, 64);
-      total_height = ALIGN(total_height, 64);
-   }
-
    uint32_t tiling = intel_miptree_choose_tiling(intel, format, width0,
                                                  num_samples, force_y_tiling);
    mt->etc_format = etc_format;
    mt->region = intel_region_alloc(intel->intelScreen,
 				   tiling,
 				   mt->cpp,
-				   total_width,
-				   total_height,
+				   mt->total_width,
+				   mt->total_height,
 				   expect_accelerated_upload);
    mt->offset = 0;
 
-- 
1.8.1.2