[Mesa-dev] [PATCH 00/10] (gles3) glsl, i965: Implement GLSL ES 3.00 pack/unpack functions

[Chad Versace]

This series lives on my gles3-glsl-packing branch.

Tested against my piglit gles3-glsl-packing branch on gen6 and gen7. All tests
pass. However, the tests and implementation share much common code and
concepts, so thorough review is welcome.

This is my first attempt at emitting native i965 code, so please review it
carefully.  Just because it passes my tests does not imply that it's correct.

In patch "i965/vs/gen7", there is a comment explaining a potential
optimization that I did not know how to achieve. I'm happy committing this
series as-is without the optimization, but I'd like feedbach on how to achieve
it so I can do it in a follow-on series.

Chad Versace (10):
  glsl: Fix typo in comment
  glsl: Add IR lisp for GLSL ES 3.00 pack/unpack functions
  glsl: Extend ir_expression_operation for GLSL 3.00 pack/unpack
    functions
  glsl: Evaluate constant GLSL ES 3.00 pack/unpack operations
  glsl: Add lowering pass for GLSL ES 3.00 pack/unpack operations
  i965: Lower the GLSL ES 3.00 pack/unpack operations
  i965:  Add opcodes for F32TO16 and F16TO32
  i965: Quote the PRM to document a HorzStride subtlety
  i965/vs/gen7: Emit code for GLSL ES 3.00 pack/unpack operations
  i965/fs/gen7: Emit code for GLSL 3.00 pack/unpack operations

 src/glsl/Makefile.sources                          |    1 +
 src/glsl/builtins/ir/packHalf2x16.ir               |    6 +
 src/glsl/builtins/ir/packSnorm2x16.ir              |    6 +
 src/glsl/builtins/ir/packUnorm2x16.ir              |    6 +
 src/glsl/builtins/ir/unpackHalf2x16.ir             |    6 +
 src/glsl/builtins/ir/unpackSnorm2x16.ir            |    6 +
 src/glsl/builtins/ir/unpackUnorm2x16.ir            |    6 +
 src/glsl/builtins/profiles/300es.glsl              |   14 +-
 src/glsl/ir.cpp                                    |   27 +
 src/glsl/ir.h                                      |   33 +-
 src/glsl/ir_constant_expression.cpp                |  362 +++++
 src/glsl/ir_optimization.h                         |   18 +
 src/glsl/ir_validate.cpp                           |   26 +
 src/glsl/lower_packing_builtins.cpp                | 1567 ++++++++++++++++++++
 src/mesa/drivers/dri/i965/brw_defines.h            |    3 +
 src/mesa/drivers/dri/i965/brw_disasm.c             |    2 +
 src/mesa/drivers/dri/i965/brw_eu.h                 |    2 +
 src/mesa/drivers/dri/i965/brw_eu_emit.c            |    7 +-
 src/mesa/drivers/dri/i965/brw_fs.h                 |    7 +
 .../dri/i965/brw_fs_channel_expressions.cpp        |   29 +-
 src/mesa/drivers/dri/i965/brw_fs_emit.cpp          |   39 +-
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp       |   78 +-
 src/mesa/drivers/dri/i965/brw_shader.cpp           |   32 +
 src/mesa/drivers/dri/i965/brw_vec4.h               |    3 +
 src/mesa/drivers/dri/i965/brw_vec4_emit.cpp        |    8 +
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp     |  156 +-
 src/mesa/program/ir_to_mesa.cpp                    |   12 +-
 27 files changed, 2446 insertions(+), 16 deletions(-)
 create mode 100644 src/glsl/builtins/ir/packHalf2x16.ir
 create mode 100644 src/glsl/builtins/ir/packSnorm2x16.ir
 create mode 100644 src/glsl/builtins/ir/packUnorm2x16.ir
 create mode 100644 src/glsl/builtins/ir/unpackHalf2x16.ir
 create mode 100644 src/glsl/builtins/ir/unpackSnorm2x16.ir
 create mode 100644 src/glsl/builtins/ir/unpackUnorm2x16.ir
 create mode 100644 src/glsl/lower_packing_builtins.cpp

-- 
1.8.1