[Mesa-dev] [PATCH 03/10] glsl: Extend ir_expression_operation for GLSL 3.00 pack/unpack functions

[Ian Romanick]

On 01/10/2013 12:10 AM, Chad Versace wrote:
> For each function {pack,unpack}{Snorm,Unorm,Half}2x16, add a corresponding
> opcode to enum ir_expression_operation.  Validate the new opcodes in
> ir_validate.cpp.
>
> Also, add opcodes for scalarized variants of the Half2x16 functions.  (The
> code generator for the i965 fragment shader requires that all vector
> operations be scalarized.  A lowering pass, to be added later, will
> scalarize the Half2x16 functions).
>
> Signed-off-by: Chad Versace <chad.versace at linux.intel.com>

One nit below...

> ---
>   src/glsl/ir.cpp                 | 27 +++++++++++++++++++++++++++
>   src/glsl/ir.h                   | 31 +++++++++++++++++++++++++++++++
>   src/glsl/ir_validate.cpp        | 26 ++++++++++++++++++++++++++
>   src/mesa/program/ir_to_mesa.cpp | 12 +++++++++++-
>   4 files changed, 95 insertions(+), 1 deletion(-)
>
> diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp
> index 703f5ec..ddaf3c3 100644
> --- a/src/glsl/ir.cpp
> +++ b/src/glsl/ir.cpp
> @@ -306,6 +306,8 @@ ir_expression::ir_expression(int op, ir_rvalue *op0)
>         break;
>
>      case ir_unop_noise:
> +   case ir_unop_unpack_half_2x16_split_x:
> +   case ir_unop_unpack_half_2x16_split_y:
>         this->type = glsl_type::float_type;
>         break;
>
> @@ -313,6 +315,18 @@ ir_expression::ir_expression(int op, ir_rvalue *op0)
>         this->type = glsl_type::bool_type;
>         break;
>
> +   case ir_unop_pack_snorm_2x16:
> +   case ir_unop_pack_unorm_2x16:
> +   case ir_unop_pack_half_2x16:
> +      this->type = glsl_type::uint_type;
> +      break;
> +
> +   case ir_unop_unpack_snorm_2x16:
> +   case ir_unop_unpack_unorm_2x16:
> +   case ir_unop_unpack_half_2x16:
> +      this->type = glsl_type::vec2_type;
> +      break;
> +
>      default:
>         assert(!"not reached: missing automatic type setup for ir_expression");
>         this->type = op0->type;
> @@ -386,6 +400,10 @@ ir_expression::ir_expression(int op, ir_rvalue *op0, ir_rvalue *op1)
>         this->type = glsl_type::float_type;
>         break;
>
> +   case ir_binop_pack_half_2x16_split:
> +      this->type = glsl_type::uint_type;
> +      break;
> +
>      case ir_binop_lshift:
>      case ir_binop_rshift:
>         this->type = op0->type;
> @@ -454,6 +472,14 @@ static const char *const operator_strs[] = {
>      "cos_reduced",
>      "dFdx",
>      "dFdy",
> +   "packSnorm2x16",
> +   "packUnorm2x16",
> +   "packHalf2x16",
> +   "unpackSnorm2x16",
> +   "unpackUnorm2x16",
> +   "unpackHalf2x16",
> +   "unpackHalf2x16_split_x",
> +   "unpackHalf2x16_split_y",
>      "noise",
>      "+",
>      "-",
> @@ -480,6 +506,7 @@ static const char *const operator_strs[] = {
>      "min",
>      "max",
>      "pow",
> +   "packHalf2x16_split",
>      "ubo_load",
>      "vector",
>   };
> diff --git a/src/glsl/ir.h b/src/glsl/ir.h
> index c9c91e8..c1fbe7c 100644
> --- a/src/glsl/ir.h
> +++ b/src/glsl/ir.h
> @@ -969,6 +969,28 @@ enum ir_expression_operation {
>      ir_unop_dFdy,
>      /*@}*/
>
> +   /**
> +    * \name Floating point pack and unpack operations.
> +    */
> +   /*@{*/
> +   ir_unop_pack_snorm_2x16,
> +   ir_unop_pack_unorm_2x16,
> +   ir_unop_pack_half_2x16,
> +   ir_unop_unpack_snorm_2x16,
> +   ir_unop_unpack_unorm_2x16,
> +   ir_unop_unpack_half_2x16,
> +   /*@}*/
> +
> +   /**
> +    * \name Lowered floating point unpacking operations.
> +    *
> +    * \see lower_packing_builtins_visitor::split_unpack_half_2x16
> +    */
> +   /*@{*/
> +   ir_unop_unpack_half_2x16_split_x,
> +   ir_unop_unpack_half_2x16_split_y,
> +   /*@}*/
> +
>      ir_unop_noise,
>
>      /**
> @@ -1036,6 +1058,15 @@ enum ir_expression_operation {
>      ir_binop_pow,
>
>      /**
> +    * \name Lowered floating point packing operations.
> +    *
> +    * \see lower_packing_builtins_visitor::split_pack_half_2x16
> +    */
> +   /*@{*/
> +   ir_binop_pack_half_2x16_split,
> +   /*@}*/
> +
> +   /**
>       * Load a value the size of a given GLSL type from a uniform block.
>       *
>       * operand0 is the ir_constant uniform block index in the linked shader.
> diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp
> index ad57a31..9019637 100644
> --- a/src/glsl/ir_validate.cpp
> +++ b/src/glsl/ir_validate.cpp
> @@ -329,6 +329,26 @@ ir_validate::visit_leave(ir_expression *ir)
>         assert(ir->operands[0]->type == ir->type);
>         break;
>
> +   case ir_unop_pack_snorm_2x16:
> +   case ir_unop_pack_unorm_2x16:
> +   case ir_unop_pack_half_2x16:
> +      assert(ir->type == glsl_type::uint_type);
> +      assert(ir->operands[0]->type == glsl_type::vec2_type);
> +      break;
> +
> +   case ir_unop_unpack_snorm_2x16:
> +   case ir_unop_unpack_unorm_2x16:
> +   case ir_unop_unpack_half_2x16:
> +      assert(ir->type == glsl_type::vec2_type);
> +      assert(ir->operands[0]->type == glsl_type::uint_type);
> +      break;
> +
> +   case ir_unop_unpack_half_2x16_split_x:
> +   case ir_unop_unpack_half_2x16_split_y:
> +      assert(ir->type == glsl_type::float_type);
> +      assert(ir->operands[0]->type == glsl_type::uint_type);
> +      break;
> +
>      case ir_unop_noise:
>         /* XXX what can we assert here? */
>         break;
> @@ -423,6 +443,12 @@ ir_validate::visit_leave(ir_expression *ir)
>         assert(ir->operands[0]->type == ir->operands[1]->type);
>         break;
>
> +   case ir_binop_pack_half_2x16_split:
> +      assert(ir->type == glsl_type::uint_type);
> +      assert(ir->operands[0]->type == glsl_type::float_type);
> +      assert(ir->operands[1]->type == glsl_type::float_type);
> +      break;
> +
>      case ir_binop_ubo_load:
>         assert(ir->operands[0]->as_constant());
>         assert(ir->operands[0]->type == glsl_type::uint_type);
> diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
> index d5b9683..cab4f9c 100644
> --- a/src/mesa/program/ir_to_mesa.cpp
> +++ b/src/mesa/program/ir_to_mesa.cpp
> @@ -1427,7 +1427,17 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
>      case ir_unop_fract:
>         emit(ir, OPCODE_FRC, result_dst, op[0]);
>         break;
> -
> +   case ir_unop_pack_snorm_2x16:
> +   case ir_unop_pack_unorm_2x16:
> +   case ir_unop_pack_half_2x16:
> +   case ir_unop_unpack_snorm_2x16:
> +   case ir_unop_unpack_unorm_2x16:
> +   case ir_unop_unpack_half_2x16:
> +   case ir_unop_unpack_half_2x16_split_x:
> +   case ir_unop_unpack_half_2x16_split_y:
> +   case ir_binop_pack_half_2x16_split:
> +      assert(!"should be handled by lower_packing_builtins");
> +      break;

ir_to_mesa can't handle the shifts, etc. that are generated by the 
lowering pass either, so this message is kind of a lie. :)

>      case ir_binop_min:
>         emit(ir, OPCODE_MIN, result_dst, op[0], op[1]);
>         break;
>