[Mesa-dev] [PATCH] R600/SI: Add patterns for V_MAD(_LEGACY) instructions.

[Tom Stellard]

On Mon, Jan 21, 2013 at 04:40:47PM +0100, Michel Dänzer wrote:
> From: Michel Dänzer <michel.daenzer at amd.com>
> 
> 

I don't think we emit the int_AMDGPU_mul intrinsic anymore, but it probably
doesn't hurt to keep it around until we sort out all of the legacy vs non-legacy
instruction issues.

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

> Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
> ---
>  lib/Target/R600/SIInstructions.td |   10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td
> index 4164c55..01b61f7 100644
> --- a/lib/Target/R600/SIInstructions.td
> +++ b/lib/Target/R600/SIInstructions.td
> @@ -1316,6 +1316,16 @@ def : Pat <
>  def : POW_Common <V_LOG_F32_e32, V_EXP_F32_e32, V_MUL_F32_e32, VReg_32>;
>  
>  def : Pat <
> +  (fadd (int_AMDGPU_mul AllReg_32:$src0, VReg_32:$src1), VReg_32:$src2),
> +  (V_MAD_LEGACY_F32 AllReg_32:$src0, VReg_32:$src1, VReg_32:$src2, 0, 0, 0, 0)
> +>;
> +
> +def : Pat <
> +  (fadd (fmul AllReg_32:$src0, VReg_32:$src1), VReg_32:$src2),
> +  (V_MAD_F32 AllReg_32:$src0, VReg_32:$src1, VReg_32:$src2, 0, 0, 0, 0)
> +>;
> +
> +def : Pat <
>    (int_AMDGPU_div AllReg_32:$src0, AllReg_32:$src1),
>    (V_MUL_LEGACY_F32_e32 AllReg_32:$src0, (V_RCP_LEGACY_F32_e32 AllReg_32:$src1))
>  >;
> -- 
> 1.7.10.4
> 
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