[Mesa-dev] [RFC PATCH 11/12] i965 gen7: don't set FORCE_ZERO_RTAINDEX in clip state

Paul Berry stereotype441 at gmail.com
Wed Jul 17 12:53:47 PDT 2013


On 15 July 2013 17:14, Jordan Justen <jordan.l.justen at intel.com> wrote:

> We now also need to stop setting the FORCE_ZERO_RTAINDEX bit
> in the clip date so render target array values other than zero
>

Do you mean "clip state"?


> can be used.
>
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/gen7_clip_state.c |    3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/gen7_clip_state.c
> b/src/mesa/drivers/dri/i965/gen7_clip_state.c
> index 36a793c..e0ed882 100644
> --- a/src/mesa/drivers/dri/i965/gen7_clip_state.c
> +++ b/src/mesa/drivers/dri/i965/gen7_clip_state.c
> @@ -117,8 +117,7 @@ upload_clip_state(struct brw_context *brw)
>              GEN6_CLIP_XY_TEST |
>               dw2);
>     OUT_BATCH(U_FIXED(0.125, 3) << GEN6_CLIP_MIN_POINT_WIDTH_SHIFT |
> -             U_FIXED(255.875, 3) << GEN6_CLIP_MAX_POINT_WIDTH_SHIFT |
> -             GEN6_CLIP_FORCE_ZERO_RTAINDEX);
> +             U_FIXED(255.875, 3) << GEN6_CLIP_MAX_POINT_WIDTH_SHIFT);
>

What happens if a shader is in use that writes to gl_Layer, but the current
framebuffer is not layered?

According to the AMD_vertex_shader_layer spec, "A layer number written by a
vertex or geometry shader has no effect if the framebuffer is not
layered."  There's similar language in the ARB_geometry_shader4 and GL 3.2
specs.

It looks to me like in order to achieve that, we need to set
GEN6_CLIP_FORCE_ZERO_RTAINDEX whenever rendering to a non-layered
framebuffer.


>     ADVANCE_BATCH();
>  }
>
> --
> 1.7.10.4
>
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