[Mesa-dev] [PATCH 2/2] i965/hsw: Set MOCS to L3_CACHEABLE for some packets
Chad Versace
chad.versace at linux.intel.com
Wed Jul 17 15:45:47 PDT 2013
On 07/17/2013 03:01 PM, Chad Versace wrote:
> On 07/17/2013 02:42 PM, Chris Wilson wrote:
>> On Wed, Jul 17, 2013 at 02:28:55PM -0700, Chad Versace wrote:
>>> Set MOCS to L3_CACHEABLE for the following packets, during the normal
>>> draw upload path and during blorp:
>>> SURFACE_STATE
>>> 3DSTATE_DEPTH_BUFFER
>>> 3DSTATE_HIER_DEPTH_BUFFER
>>> 3DSTATE_STENCIL_BUFFER
>>>
>>> It's not possible to set the MOCS of the MCS buffer, because the MCS
>>> inherits MOCS from the parent surface.
>
>
>> Do you not have to worry about scanout coherency (e.g. frontbuffer
>> rendering)?
>
> I forgot about that. We also may need to worry about the case where
> the compositor un-redirects the fullscreen client.
>
> I don't how to detect if the color buffer is the scanout buffer. And,
> given that the compositor may un-redirect the client when fullscreen,
> I wouldn't trust any half-baked ideas I have on how to do that detection.
> Any advice?
>
> I wish the hardware were magical and would ignore the MOCS for the
> scanout buffer, but I haven't found that magic in the hw docs.
Per the IRC discussion, I verified that this doesn't matter on HSW. That is,
setting L3_cacheable in MOCS doesn't corrupt rendering, even for fullscreen
non-composited apps.
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