[Mesa-dev] [PATCH 2/2] i965/hsw: Set MOCS to L3_CACHEABLE for some packets

[Chad Versace]

On 07/18/2013 12:31 AM, Kenneth Graunke wrote:
> On 07/17/2013 04:46 PM, Chad Versace wrote:
>> Set MOCS to L3_CACHEABLE for the following packets, during the normal
>> draw upload path and during blorp:
>>      3DSTATE_CONSTANT_PS
>>      3DSTATE_CONSTANT_VS
>>      3DSTATE_DEPTH_BUFFER
>>      3DSTATE_HIER_DEPTH_BUFFER
>>      3DSTATE_STENCIL_BUFFER
>>      3DSTATE_VERTEX_BUFFERS
>>      CMD_STATE_BASE_ADDRESS
>>      SURFACE_STATE
>>
>> It's not possible to set the MOCS of the MCS buffer, because the MCS
>> inherits MOCS from the parent surface.
>>
>> Gives +5.68% on Xonotic 1920x1080 on Haswell GT2.
>
> At this point, I'm quite happy to accept your choices of what to cache.
>
> Two comments:
>
> I'd really prefer to see each change split into a separate patch.  You don't need to benchmark them separately or
> anything, but it'd be nice. I know Eric had hoped to see this happen as well.

I considered that, but hesitated. I agree, such a patch series will be nicer. V3 coming soon.

> I'd also prefer to see:
>
>    uint32_t mocs = brw->is_haswell ? GEN7_MOCS_L3 : 0;
>
> rather than if-blocks...it's just more concise.  Not a big deal either way, though.

Sure. The if-blocks were an artifact of a more complex experiment I was doing. But,
now that the MOCS settings are so simple, there's no longer a need for the if-block.