[Mesa-dev] [PATCH 2/2] i965: Add MOCS shift and mask for SURFACE_STATE entries.

[Chad Versace]

On 07/18/2013 12:10 AM, Kenneth Graunke wrote:
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> Cc: Chad Versace <chad.versace at linux.intel.com>
> ---
>   src/mesa/drivers/dri/i965/brw_defines.h | 3 +++
>   1 file changed, 3 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
> index db63b2b..ee802f9 100644
> --- a/src/mesa/drivers/dri/i965/brw_defines.h
> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> @@ -551,6 +551,9 @@
>   #define GEN7_SURFACE_MIN_LOD_SHIFT              4
>   #define GEN7_SURFACE_MIN_LOD_MASK               INTEL_MASK(7, 4)
>
> +#define GEN7_SURFACE_MOCS_SHIFT                 16
> +#define GEN7_SURFACE_MOCS_MASK                  INTEL_MASK(19, 16)
> +
>   /* Surface state DW6 */
>   #define GEN7_SURFACE_MCS_ENABLE                 (1 << 0)
>   #define GEN7_SURFACE_MCS_PITCH_SHIFT            3
>

Patch 2 is
Reviewed-by: Chad Versace <chad.versace at linux.intel.com>