[Mesa-dev] [PATCH 0/5] i965/hsw: Use L3 with MOCS

Chad Versace chad.versace at linux.intel.com
Thu Jul 18 15:00:56 PDT 2013


Nothing was landing in the L3 cache because we neglected to set the MOCS L3
bit. This fixes that and puts a bunch of stuff into L3.

Improves Xonotic 1920x1080 by +5.68% on Haswell Mobile GT2.
No Piglit regressions.

This series depends on Ken's recent patches and lives on my hsw-mocs-l3-v04 branc.

Performance Measurements
========================

system-info {
    gpu: haswell_m_gt2 0x0416 rev05
    arch: x86_64
    kernel: 3.9.9-1-ARCH (Archlinux)
    xf86-video-intel: 2.12.11-1 (Archlinux)
    libdrm: 2.4.46-2 (Archlinux)
}

test {
    name: pts/xonotic-1.3.1 1920x1080 quality=high
    delta: +5.68152% +/- 0.653452(student's t) at 95% confidence
    n: 3
    pooled-s: 0.288297
    mesa-base: master-00d32cd
}

Chad Versace (5):
  i965/hsw: Change L3 MOCS of STATE_BASE_ADDRESS
  i965/hsw: Change L3 MOCS of 3DSTATE_VERTEX_BUFFERS
  i965/hsw: Change L3 MOCS of SURFACE_STATE
  i965/hsw: Change L3 MOCS of 3DSTATE_CONSTANT_VS/PS
  i965/hsw: Change L3 MOCS for depth, hiz, and stencil

 src/mesa/drivers/dri/i965/brw_draw_upload.c       |  3 +++
 src/mesa/drivers/dri/i965/brw_misc_state.c        |  9 ++++++++-
 src/mesa/drivers/dri/i965/gen6_blorp.cpp          | 12 +++++++++++-
 src/mesa/drivers/dri/i965/gen7_blorp.cpp          | 14 ++++++++++----
 src/mesa/drivers/dri/i965/gen7_misc_state.c       |  7 +++++--
 src/mesa/drivers/dri/i965/gen7_vs_state.c         |  4 +++-
 src/mesa/drivers/dri/i965/gen7_wm_state.c         |  4 +++-
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |  6 +++++-
 8 files changed, 48 insertions(+), 11 deletions(-)

-- 
1.8.3.1



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