[Mesa-dev] [PATCH] r600g/compute: disable unused colorbuffer slots

[Marek Olšák]

Does setting R600_CONTEXT_FLUSH_AND_INV after
evergreen_emit_direct_dispatch help? I think we should always flush
the write caches at the end of CS and invalidate the read caches at
the beginning, not the other way around.

Marek

On Mon, Jun 24, 2013 at 7:25 PM, Tom Stellard <tom at stellard.net> wrote:
> On Mon, Jun 24, 2013 at 03:31:50AM +0200, Marek Olšák wrote:
>> This might fix the lockups caused by colorbuffer flushes and it's generally
>> the right thing to do. Untested.
>
> Unfortunately, this doesn't fix the lockups on Cayman with VM enabled,
> but there are no regressions with it, so go ahead and commit.
>
> Tested-by: Tom Stellard <thomas.stellard at amd.com>
>
>> ---
>>  src/gallium/drivers/r600/evergreen_compute.c | 13 ++++++++++++-
>>  1 file changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c
>> index c993c09..b4cb939 100644
>> --- a/src/gallium/drivers/r600/evergreen_compute.c
>> +++ b/src/gallium/drivers/r600/evergreen_compute.c
>> @@ -408,7 +408,8 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout,
>>       r600_flush_emit(ctx);
>>
>>       /* Emit colorbuffers. */
>> -     for (i = 0; i < ctx->framebuffer.state.nr_cbufs; i++) {
>> +     /* XXX support more than 8 colorbuffers (the offsets are not a multiple of 0x3C for CB8-11) */
>> +     for (i = 0; i < 8 && i < ctx->framebuffer.state.nr_cbufs; i++) {
>>               struct r600_surface *cb = (struct r600_surface*)ctx->framebuffer.state.cbufs[i];
>>               unsigned reloc = r600_context_bo_reloc(ctx, &ctx->rings.gfx,
>>                                                      (struct r600_resource*)cb->base.texture,
>> @@ -434,6 +435,16 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout,
>>               r600_write_value(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C74_CB_COLOR0_ATTRIB */
>>               r600_write_value(cs, reloc);
>>       }
>> +     if (ctx->keep_tiling_flags) {
>> +             for (; i < 8 ; i++) {
>> +                     r600_write_compute_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C,
>> +                                                    S_028C70_FORMAT(V_028C70_COLOR_INVALID));
>> +             }
>> +             for (; i < 12; i++) {
>> +                     r600_write_compute_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) * 0x1C,
>> +                                                    S_028C70_FORMAT(V_028C70_COLOR_INVALID));
>> +             }
>> +     }
>>
>>       /* Set CB_TARGET_MASK  XXX: Use cb_misc_state */
>>       r600_write_compute_context_reg(cs, R_028238_CB_TARGET_MASK,
>> --
>> 1.8.1.2
>>
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