[Mesa-dev] [PATCH 1/5] i965/fs: Fix register allocation for uniform pull constants in 16-wide.
kenneth at whitecape.org
Thu Mar 7 08:33:51 PST 2013
On 03/06/2013 06:57 PM, Eric Anholt wrote:
> We were allowing a compressed instruction to write a register that
> contained the last use of a uniform pull constant (either UBO load or push
> constant spillover), so it would get half its values smashed.
> Since we need to see the actual instruction to decide this, move the
> pre-gen6 pixel_x/y logic here, which should improve the performance of
> register allocation since virtual_grf_interferes() is called more than
> once per instruction.
> NOTE: This is a candidate for the stable branches.
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61317
> .../drivers/dri/i965/brw_fs_live_variables.cpp | 54 +++++++++++---------
> 1 file changed, 31 insertions(+), 23 deletions(-)
I'm really glad to see LD constant loads for the FS land. Also glad to
see XBMC fixed!
This series is:
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
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