[Mesa-dev] [PATCH] R600: Lower clamp constant to constant

[Vincent Lejeune]

---
 lib/Target/R600/R600ISelLowering.cpp | 23 +++++++++++++++++++++++
 test/CodeGen/R600/clamp-constants.ll | 20 ++++++++++++++++++++
 2 files changed, 43 insertions(+)
 create mode 100644 test/CodeGen/R600/clamp-constants.ll

diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp
index a73691d..96686e6 100644
--- a/lib/Target/R600/R600ISelLowering.cpp
+++ b/lib/Target/R600/R600ISelLowering.cpp
@@ -394,6 +394,29 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
 
       return SDValue(interp, slot % 2);
     }
+    case AMDGPUIntrinsic::AMDIL_clamp: {
+      ConstantFPSDNode *Min = dyn_cast<ConstantFPSDNode>(Op.getOperand(2));
+      ConstantFPSDNode *Max = dyn_cast<ConstantFPSDNode>(Op.getOperand(3));
+      if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op.getOperand(1))) {
+        switch (C->getValueAPF().compare(Max->getValueAPF())) {
+        case APFloat::cmpGreaterThan:
+        case APFloat::cmpEqual:
+          return Op.getOperand(3);
+        default:
+          break;
+        }
+
+        switch (C->getValueAPF().compare(Min->getValueAPF())) {
+        case APFloat::cmpLessThan:
+        case APFloat::cmpEqual:
+          return Op.getOperand(2);
+        default:
+          break;
+        }
+        return Op.getOperand(1);
+      }
+      break;
+    }
 
     case r600_read_ngroups_x:
       return LowerImplicitParameter(DAG, VT, DL, 0);
diff --git a/test/CodeGen/R600/clamp-constants.ll b/test/CodeGen/R600/clamp-constants.ll
new file mode 100644
index 0000000..cf4d35f
--- /dev/null
+++ b/test/CodeGen/R600/clamp-constants.ll
@@ -0,0 +1,20 @@
+;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+
+;CHECK-NOT: MOV
+
+define void @main() {
+main_body:
+  %0 = call float @llvm.AMDIL.clamp.(float 1.500000e+00, float 0.000000e+00, float 1.000000e+00)
+  %1 = call float @llvm.AMDIL.clamp.(float 0.000000e+00, float 0.000000e+00, float 1.000000e+00)
+  %2 = call float @llvm.AMDIL.clamp.(float 1.000000e+00, float 0.000000e+00, float 1.000000e+00)
+  %3 = call float @llvm.AMDIL.clamp.(float -0.500000e+00, float 0.000000e+00, float 1.000000e+00)
+  %4 = insertelement <4 x float> undef, float %0, i32 0
+  %5 = insertelement <4 x float> %4, float %1, i32 1
+  %6 = insertelement <4 x float> %5, float %2, i32 2
+  %7 = insertelement <4 x float> %6, float %3, i32 3
+  call void @llvm.R600.store.swizzle(<4 x float> %7, i32 0, i32 0)
+  ret void
+}
+
+declare float @llvm.AMDIL.clamp.(float, float, float) readnone
+declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
-- 
1.8.1.4