[Mesa-dev] [PATCH] intel: add and use the always_have_depth_buffer DRI config option

[Brian Paul]

When set to true, create all GLX visual configs with a depth buffer.
Used to allow apps such as Topogun to work properly on Linux.
This is just like the option recently added for gallium DRI drivers.

--

Note: I only compile-tested this.  It would be great if an Intel
developer could test.  A free demo of Topogun is available.
---
 src/mesa/drivers/dri/intel/intel_screen.c |   60 +++++++++++++++++++---------
 1 files changed, 41 insertions(+), 19 deletions(-)

diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 3ca10c8..80b925e 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -93,6 +93,10 @@ PUBLIC const char __driConfigOptions[] =
 	 DRI_CONF_DESC(en, "Perform code generation at shader link time.")
       DRI_CONF_OPT_END
    DRI_CONF_SECTION_END
+
+   DRI_CONF_SECTION_MISCELLANEOUS
+      DRI_CONF_ALWAYS_HAVE_DEPTH_BUFFER(false)
+   DRI_CONF_SECTION_END
 DRI_CONF_END;
 
 const GLuint __driNConfigOptions = 17;
@@ -1084,35 +1088,46 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
    uint8_t depth_bits[4], stencil_bits[4];
    __DRIconfig **configs = NULL;
 
+   bool always_have_depth_buffer =
+      driQueryOptionb(&screen->optionCache, "always_have_depth_buffer");
+
    /* Generate singlesample configs without accumulation buffer. */
    for (int i = 0; i < ARRAY_SIZE(formats); i++) {
       __DRIconfig **new_configs;
-      int num_depth_stencil_bits = 2;
+      int num_ds_modes;
 
       /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
        * buffer that has a different number of bits per pixel than the color
        * buffer, gen >= 6 supports this.
        */
-      depth_bits[0] = 0;
-      stencil_bits[0] = 0;
+      if (always_have_depth_buffer) {
+         num_ds_modes = 0;
+      }
+      else {
+         depth_bits[0] = 0;
+         stencil_bits[0] = 0;
+         num_ds_modes = 1;
+      }
 
       if (formats[i] == MESA_FORMAT_RGB565) {
-         depth_bits[1] = 16;
-         stencil_bits[1] = 0;
+         depth_bits[num_ds_modes] = 16;
+         stencil_bits[num_ds_modes] = 0;
+         num_ds_modes++;
          if (screen->gen >= 6) {
-             depth_bits[2] = 24;
-             stencil_bits[2] = 8;
-             num_depth_stencil_bits = 3;
+             depth_bits[num_ds_modes] = 24;
+             stencil_bits[num_ds_modes] = 8;
+             num_ds_modes++;
          }
       } else {
-         depth_bits[1] = 24;
-         stencil_bits[1] = 8;
+         depth_bits[num_ds_modes] = 24;
+         stencil_bits[num_ds_modes] = 8;
+         num_ds_modes++;
       }
 
       new_configs = driCreateConfigs(formats[i],
                                      depth_bits,
                                      stencil_bits,
-                                     num_depth_stencil_bits,
+                                     num_ds_modes,
                                      back_buffer_modes, 2,
                                      singlesample_samples, 1,
                                      false);
@@ -1159,19 +1174,26 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
          break;
 
       __DRIconfig **new_configs;
-      const int num_depth_stencil_bits = 2;
+      int num_ds_modes;
       int num_msaa_modes = 0;
 
-      depth_bits[0] = 0;
-      stencil_bits[0] = 0;
+      if (always_have_depth_buffer) {
+         num_ds_modes = 0;
+      }
+      else {
+         depth_bits[0] = 0;
+         stencil_bits[0] = 0;
+         num_ds_modes = 1;
+      }
 
       if (formats[i] == MESA_FORMAT_RGB565) {
-         depth_bits[1] = 16;
-         stencil_bits[1] = 0;
+         depth_bits[num_ds_modes] = 16;
+         stencil_bits[num_ds_modes] = 0;
       } else {
-         depth_bits[1] = 24;
-         stencil_bits[1] = 8;
+         depth_bits[num_ds_modes] = 24;
+         stencil_bits[num_ds_modes] = 8;
       }
+      num_ds_modes++;
 
       if (screen->gen >= 7)
          num_msaa_modes = 2;
@@ -1181,7 +1203,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
       new_configs = driCreateConfigs(formats[i],
                                      depth_bits,
                                      stencil_bits,
-                                     num_depth_stencil_bits,
+                                     num_ds_modes,
                                      back_buffer_modes, 1,
                                      multisample_samples,
                                      num_msaa_modes,
-- 
1.7.3.4