[Mesa-dev] [PATCH] i965/fs: Don't perform CSE on inst HW_REG dests (unless it's null)

[Matt Turner]

Commit b16b3c87 began performing CSE on CMP instructions with null
destinations. I relaxed the restrictions a bit too much, thereby
allowing CSE to be performed on instructions with, for instance, an
explicit accumulator destination.

This broke the arb_gpu_shader5/fs-imulExtended shader tests because
they emit MUL instructions with the accumulator as the destination. CSE
would instead cause the MUL to write to a GRF, which is lower precision
than the accumulator.
---
 src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
index 4793874..27541db 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
@@ -129,7 +129,8 @@ fs_visitor::opt_cse_local(bblock_t *block, exec_list *aeb)
 	inst = (fs_inst *) inst->next) {
 
       /* Skip some cases. */
-      if (is_expression(inst) && !inst->is_partial_write())
+      if (is_expression(inst) && !inst->is_partial_write() &&
+          (inst->dst.file != HW_REG || inst->dst.is_null()))
       {
 	 bool found = false;
 
-- 
1.8.3.2