[Mesa-dev] [PATCH] r600g/compute: Add a work-around for flushing issues on Cayman
Alex Deucher
alexdeucher at gmail.com
Wed Nov 20 06:40:41 PST 2013
On Tue, Nov 19, 2013 at 10:39 PM, Tom Stellard <tom at stellard.net> wrote:
> From: Tom Stellard <thomas.stellard at amd.com>
>
> https://bugs.freedesktop.org/show_bug.cgi?id=69321
>
> CC: "10.0" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> src/gallium/drivers/r600/evergreen_compute.c | 4 ++++
> src/gallium/drivers/r600/r600_hw_context.c | 4 +++-
> src/gallium/drivers/r600/r600_pipe.h | 10 ++++++++++
> 3 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c
> index ffdc5c3..d668c8e 100644
> --- a/src/gallium/drivers/r600/evergreen_compute.c
> +++ b/src/gallium/drivers/r600/evergreen_compute.c
> @@ -474,6 +474,10 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout,
> r600_flush_emit(ctx);
> ctx->b.flags = 0;
>
> + if (ctx->b.chip_class >= CAYMAN) {
> + ctx->skip_surface_sync_on_next_cs_flush = true;
> + }
> +
> #if 0
> COMPUTE_DBG(ctx->screen, "cdw: %i\n", cs->cdw);
> for (i = 0; i < cs->cdw; i++) {
> diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
> index 5f3a9bd..191a81d 100644
> --- a/src/gallium/drivers/r600/r600_hw_context.c
> +++ b/src/gallium/drivers/r600/r600_hw_context.c
> @@ -293,7 +293,7 @@ void r600_flush_emit(struct r600_context *rctx)
> S_0085F0_SMX_ACTION_ENA(1);
> }
>
> - if (cp_coher_cntl) {
> + if (cp_coher_cntl && !rctx->skip_surface_sync_on_next_cs_flush) {
> cs->buf[cs->cdw++] = PKT3(PKT3_SURFACE_SYNC, 3, 0);
> cs->buf[cs->cdw++] = cp_coher_cntl; /* CP_COHER_CNTL */
> cs->buf[cs->cdw++] = 0xffffffff; /* CP_COHER_SIZE */
> @@ -354,6 +354,8 @@ void r600_context_flush(struct r600_context *ctx, unsigned flags)
>
> /* Flush the CS. */
> ctx->b.ws->cs_flush(ctx->b.rings.gfx.cs, flags, ctx->screen->cs_count++);
> +
> + ctx->skip_surface_sync_on_next_cs_flush = false;
> }
>
> void r600_begin_new_cs(struct r600_context *ctx)
> diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
> index d7af618..f0d4be4 100644
> --- a/src/gallium/drivers/r600/r600_pipe.h
> +++ b/src/gallium/drivers/r600/r600_pipe.h
> @@ -507,6 +507,16 @@ struct r600_context {
>
> void *sb_context;
> struct r600_isa *isa;
> +
> + /* Work-around for flushing problems with compute shaders on Cayman:
> + * Emitting a SURFACE_SYNC packet with any of the CB*_DEST_BASE_ENA
> + * or DB_DEST_BASE_ENA bits set after dispatching a compute shader
> + * hangs the GPU.
> + *
> + * Setting this to true will prevent r600_flush_emit() from emitting
> + * a SURFACE_SYNC packet. This field will be cleared by
> + * by r600_context_flush() after flushing the command stream. */
> + boolean skip_surface_sync_on_next_cs_flush;
> };
>
> static INLINE void r600_emit_command_buffer(struct radeon_winsys_cs *cs,
> --
> 1.8.1.5
>
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