[Mesa-dev] [PATCH 2/9] i965: allow fs generator use without gl_fragment_program
Topi Pohjolainen
topi.pohjolainen at intel.com
Wed Nov 27 13:10:58 PST 2013
Prepares the generator to accept hand-crafted blorp programs.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index e562db8..467d255 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -116,7 +116,7 @@ fs_generator::generate_fb_write(fs_inst *inst)
brw_set_mask_control(p, BRW_MASK_DISABLE);
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
- if (fp->UsesKill || c->key.alpha_test_func) {
+ if ((fp && fp->UsesKill) || c->key.alpha_test_func) {
struct brw_reg pixel_mask;
if (brw->gen >= 6)
@@ -1300,9 +1300,12 @@ fs_generator::generate_code(exec_list *instructions)
if (shader) {
printf("Native code for fragment shader %d (%d-wide dispatch):\n",
prog->Name, dispatch_width);
- } else {
+ } else if (fp) {
printf("Native code for fragment program %d (%d-wide dispatch):\n",
fp->Base.Id, dispatch_width);
+ } else {
+ printf("Native code for blorp program (%d-wide dispatch):\n",
+ dispatch_width);
}
}
@@ -1340,7 +1343,7 @@ fs_generator::generate_code(exec_list *instructions)
else {
const prog_instruction *fpi;
fpi = (const prog_instruction *)inst->ir;
- printf("%d: ", (int)(fpi - fp->Base.Instructions));
+ printf("%d: ", (int)(fpi - (fp ? fp->Base.Instructions : 0)));
_mesa_fprint_instruction_opt(stdout,
fpi,
0, PROG_PRINT_DEBUG, NULL);
--
1.8.3.1
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