[Mesa-dev] [PATCH 12/16] i965/gen7.5: Update surface state entries for renderbuffer surfaces
Abdiel Janulgue
abdiel.janulgue at linux.intel.com
Tue Oct 8 14:41:49 PDT 2013
Signed-off-by: Abdiel Janulgue <abdiel.janulgue at linux.intel.com>
---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 564ac76..2dfa05c 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -452,8 +452,13 @@ gen7_update_null_renderbuffer_surface(struct brw_context *brw, unsigned unit)
/* _NEW_BUFFERS */
const struct gl_framebuffer *fb = ctx->DrawBuffer;
+ uint32_t *surf_entry = &brw->wm.base.surf_offset[SURF_INDEX_DRAW(unit)];
uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 8 * 4, 32,
- &brw->wm.base.surf_offset[SURF_INDEX_DRAW(unit)]);
+ surf_entry);
+ if (brw->has_resource_streamer) {
+ gen7_update_binding_table(brw, STAGE_FRAGMENT_SHADER,
+ SURF_INDEX_DRAW(unit), *surf_entry);
+ }
memset(surf, 0, 8 * 4);
/* From the Ivybridge PRM, Volume 4, Part 1, page 65,
@@ -497,8 +502,13 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
uint32_t surf_index = SURF_INDEX_DRAW(unit);
+ uint32_t *surf_entry = &brw->wm.base.surf_offset[surf_index];
uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 8 * 4, 32,
- &brw->wm.base.surf_offset[surf_index]);
+ surf_entry);
+ if (brw->has_resource_streamer) {
+ gen7_update_binding_table(brw, STAGE_FRAGMENT_SHADER,
+ SURF_INDEX_DRAW(unit), *surf_entry);
+ }
memset(surf, 0, 8 * 4);
intel_miptree_used_for_rendering(irb->mt);
--
1.7.9.5
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