[Mesa-dev] [PATCH 2/9] i965: Expose write_reg() as brw_store_register_mem64().

[Kenneth Graunke]

Writing a 64-bit register value to memory is sufficiently complicated
that it makes sense to reuse this function rather than duplicating it.

Exposing it outside of gen6_queryobj.c means it needs a more descriptive
function name.  It could probably be moved to brw_util.c or somewhere
else, but this works too.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/mesa/drivers/dri/i965/brw_context.h   |  2 ++
 src/mesa/drivers/dri/i965/gen6_queryobj.c | 18 +++++++++---------
 2 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 3b95922..0229cc5 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1460,6 +1460,8 @@ void brw_emit_query_end(struct brw_context *brw);
 
 /** gen6_queryobj.c */
 void gen6_init_queryobj_functions(struct dd_function_table *functions);
+void brw_store_register_mem64(struct brw_context *brw,
+                              drm_intel_bo *bo, uint32_t reg, int idx);
 
 /*======================================================================
  * brw_state_dump.c
diff --git a/src/mesa/drivers/dri/i965/gen6_queryobj.c b/src/mesa/drivers/dri/i965/gen6_queryobj.c
index dd5cfc2..add4df9 100644
--- a/src/mesa/drivers/dri/i965/gen6_queryobj.c
+++ b/src/mesa/drivers/dri/i965/gen6_queryobj.c
@@ -103,9 +103,9 @@ write_depth_count(struct brw_context *brw, drm_intel_bo *query_bo, int idx)
  * Callers must explicitly flush the pipeline to ensure the desired value is
  * available.
  */
-static void
-write_reg(struct brw_context *brw,
-          drm_intel_bo *query_bo, uint32_t reg, int idx)
+void
+brw_store_register_mem64(struct brw_context *brw,
+                         drm_intel_bo *bo, uint32_t reg, int idx)
 {
    assert(brw->gen >= 6);
 
@@ -115,14 +115,14 @@ write_reg(struct brw_context *brw,
    BEGIN_BATCH(3);
    OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2));
    OUT_BATCH(reg);
-   OUT_RELOC(query_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+   OUT_RELOC(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
              idx * sizeof(uint64_t));
    ADVANCE_BATCH();
 
    BEGIN_BATCH(3);
    OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2));
    OUT_BATCH(reg + sizeof(uint32_t));
-   OUT_RELOC(query_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
+   OUT_RELOC(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
              sizeof(uint32_t) + idx * sizeof(uint64_t));
    ADVANCE_BATCH();
 }
@@ -133,19 +133,19 @@ write_primitives_generated(struct brw_context *brw,
 {
    intel_batchbuffer_emit_mi_flush(brw);
 
-   write_reg(brw, query_bo, CL_INVOCATION_COUNT, idx);
+   brw_store_register_mem64(brw, query_bo, CL_INVOCATION_COUNT, idx);
 }
 
 static void
 write_xfb_primitives_written(struct brw_context *brw,
-                             drm_intel_bo *query_bo, int idx)
+                             drm_intel_bo *bo, int idx)
 {
    intel_batchbuffer_emit_mi_flush(brw);
 
    if (brw->gen >= 7) {
-      write_reg(brw, query_bo, GEN7_SO_NUM_PRIMS_WRITTEN(0), idx);
+      brw_store_register_mem64(brw, bo, GEN7_SO_NUM_PRIMS_WRITTEN(0), idx);
    } else {
-      write_reg(brw, query_bo, GEN6_SO_NUM_PRIMS_WRITTEN, idx);
+      brw_store_register_mem64(brw, bo, GEN6_SO_NUM_PRIMS_WRITTEN, idx);
    }
 }
 
-- 
1.8.3.2