[Mesa-dev] [PATCH 5/8] i965/gs: Fix up gl_PointSize input swizzling for DUAL_INSTANCED gs.

[Eric Anholt]

Paul Berry <stereotype441 at gmail.com> writes:

> Geometry shaders that run in "DUAL_INSTANCED" mode store their inputs
> in vec4's.  This means that when compiling gl_PointSize input
> swizzling (a MOV instruction which uses a geometry shader input as
> both source and destination), we need to do two things:
>
> - Set force_writemask_all to ensure that the MOV happens regardless of
>   which channels are enabled.
>
> - Set the source register region to <4;4,1> (instead of <0;4,1> to
>   satisfy register region restrictions.

This sure sounds like something you empirically found, but I'm confused.
I would have assumed that DUAL_INSTANCED with an instance count of 1
meant that the channel enables the hardware gave you had the first 4
enabled and the second 4 disabled.  And since the dst.width (and thus
execsize) is 4, whether or not the second 4 are disabled wouldn't
matter.  In that case, why do you need the writemask forced, since just
the 4 channels you care about will be affected, anyway?

And, if dst.width == 4, then execsize == 4, and I'm confused what
register region restriction is being honored by promoting the hstride to
4.

Putting these fixups for a couple of weird cases in just MOV and ADD
feels wrong to me, but maybe when I understand better what's going on
it'll seem more natural.

Patches except for 5, 6 are:

Reviewed-by: Eric Anholt <eric at anholt.net>
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