[Mesa-dev] [PATCH] R600/SI: Add compute support for CI

[Michel Dänzer]

On Die, 2013-10-22 at 22:07 -0400, Tom Stellard wrote:
> 
> diff --git a/lib/Target/R600/AMDGPU.td b/lib/Target/R600/AMDGPU.td
> index a722f55..f63617f 100644
> --- a/lib/Target/R600/AMDGPU.td
> +++ b/lib/Target/R600/AMDGPU.td
[...]
> @@ -262,13 +263,24 @@ void AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF) {
>    OutStreamer.EmitIntValue(RsrcReg, 4);
>    OutStreamer.EmitIntValue(S_00B028_VGPRS(MaxVGPR / 4) | S_00B028_SGPRS(MaxSGPR / 8), 4);
>  
> +  unsigned LDSAlignShift;
> +  if (STM.getGeneration() < AMDGPUSubtarget::SEA_ISLANDS) {
> +    // LDS is allocated in 64 dword blocks
> +    LDSAlignShift = 7;
> +  } else {
> +    // LDS is allocated in 128 dword blocks
> +    LDSAlignShift = 8;
> +  }
> +  unsigned LDSBlocks =
> +          RoundUpToAlignment(MFI->LDSSize, 1 << LDSAlignShift) >> LDSAlignShift;

I think LDSAlignShift should be 8 for 64 dwords (== 256 bytes) and 9 for
128 dwords (== 512 bytes), shouldn't it?


>  ; Check that the LDS size emitted correctly
>  ; EG-CHECK: .long 166120
> -; EG-CHECK-NEXT: .long 16
> +; EG-CHECK-NEXT: .long 128
>  ; SI-CHECK: .long 47180
> -; SI-CHECK-NEXT: .long 32768
> +; SI-CHECK-NEXT: .long 131072

Maybe then the EG and SI numbers wouldn't change here.


-- 
Earthling Michel Dänzer            |                  http://www.amd.com
Libre software enthusiast          |                Mesa and X developer