[Mesa-dev] [PATCH] i965/fs: Drop no-op shifts by 0.

[Eric Anholt]

Erik Faye-Lund <kusmabite at gmail.com> writes:

> Why is this tagged as i965/fs, when everything seems to happen in the
> glsl-optimizer?
>
> On Thu, Oct 24, 2013 at 5:53 PM, Eric Anholt <eric at anholt.net> wrote:
>> I noticed this in a shader in Unigine Heaven that was spilling.  While it
>> doesn't really reduce register pressure, it shaves a few instructions
>> anyway (7955 -> 7882).
>> ---
>>  src/glsl/opt_algebraic.cpp | 8 ++++++++
>>  1 file changed, 8 insertions(+)
>>
>> diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp
>> index 37b2f02..ff06cfc 100644
>> --- a/src/glsl/opt_algebraic.cpp
>> +++ b/src/glsl/opt_algebraic.cpp
>> @@ -387,6 +387,14 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir)
>>        }
>>        break;
>>
>> +   case ir_binop_rshift:
>> +   case ir_binop_lshift:
>> +      if (is_vec_zero(op_const[0]))
>> +         return ir->operands[1];
>> +      else if (is_vec_zero(op_const[1]))
>> +         return ir->operands[0];
>> +      break;
>> +
>
> Maybe update progress inside the conditionals also?
>
> But wait a minute. x shifted by 0 is x, so the latter part looks
> correct. But the first conditional seems to assume that 0 sifted by x
> is x, but it's really 0, no? Shouldn't both cases return
> ir->operands[0]? What am I missing?

You're not missing anything -- it was just copy-and-paste fail.

New patch series incoming that should fix that, plus should reduce other
copy and paste fail in this code.
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