[Mesa-dev] [PATCH 6/9] i965/gen7: Add the ability to send URB_WRITE_OWORD messages.
Paul Berry
stereotype441 at gmail.com
Mon Sep 9 08:20:43 PDT 2013
Previously, brw_urb_WRITE() would always generate a URB_WRITE_HWORD
message, we always wanted to write data to the URB in pairs of varying
slots or larger (an HWORD is 32 bytes, which is 2 varying slots).
In order to support geometry shader EndPrimitive functionality, we'll
need the ability to write to just a single OWORD (16 byte) slot, since
we'll only be outputting 32 of the control data bits at a time. So
this patch adds a flag that will cause brw_urb_WRITE to generate a
URB_WRITE_OWORD message.
---
src/mesa/drivers/dri/i965/brw_defines.h | 3 ++-
src/mesa/drivers/dri/i965/brw_eu.h | 8 ++++++++
src/mesa/drivers/dri/i965/brw_eu_emit.c | 7 ++++++-
3 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 6db2570..4742103 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1172,7 +1172,8 @@ enum brw_message_target {
#define BRW_MATH_DATA_VECTOR 0
#define BRW_MATH_DATA_SCALAR 1
-#define BRW_URB_OPCODE_WRITE 0
+#define BRW_URB_OPCODE_WRITE_HWORD 0
+#define BRW_URB_OPCODE_WRITE_OWORD 1
#define BRW_URB_SWIZZLE_NONE 0
#define BRW_URB_SWIZZLE_INTERLEAVE 1
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 4d47cdd..720bc74 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -264,6 +264,14 @@ enum brw_urb_write_flags {
BRW_URB_WRITE_USE_CHANNEL_MASKS = 0x20,
/**
+ * Indicates that the data should be sent to the URB using the
+ * URB_WRITE_OWORD message rather than URB_WRITE_HWORD (gen == 7). This
+ * causes offsets to be interpreted as multiples of an OWORD instead of an
+ * HWORD, and only allows one OWORD to be written.
+ */
+ BRW_URB_WRITE_OWORD = 0x40,
+
+ /**
* Convenient combination of flags: end the thread while simultaneously
* marking the given URB entry as complete.
*/
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 0995a9a..9b95101 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -527,7 +527,12 @@ static void brw_set_urb_message( struct brw_compile *p,
msg_length, response_length, true,
flags & BRW_URB_WRITE_EOT);
if (brw->gen == 7) {
- insn->bits3.urb_gen7.opcode = 0; /* URB_WRITE_HWORD */
+ if (flags & BRW_URB_WRITE_OWORD) {
+ assert(msg_length == 2); /* header + one OWORD of data */
+ insn->bits3.urb_gen7.opcode = BRW_URB_OPCODE_WRITE_OWORD;
+ } else {
+ insn->bits3.urb_gen7.opcode = BRW_URB_OPCODE_WRITE_HWORD;
+ }
insn->bits3.urb_gen7.offset = offset;
assert(swizzle_control != BRW_URB_SWIZZLE_TRANSPOSE);
insn->bits3.urb_gen7.swizzle_control = swizzle_control;
--
1.8.4
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