[Mesa-dev] [PATCH 5/5] radeon/uvd: async flush the UVD cs

[Christian König]

From: Christian König <christian.koenig at amd.com>

No need to block for the CS thread here.

Signed-off-by: Christian König <christian.koenig at amd.com>
---
 src/gallium/drivers/radeon/radeon_uvd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index 518978e..fa81105 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -110,7 +110,7 @@ static void flush(struct ruvd_decoder *dec)
 	while(dec->cs->cdw % 16)
 		pm4[dec->cs->cdw++] = RUVD_PKT2();
 
-	dec->ws->cs_flush(dec->cs, 0, 0);
+	dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, 0);
 }
 
 /* add a new set register command to the IB */
-- 
1.8.1.2