[Mesa-dev] [PATCH] R600: Add a ldptr intrinsic to support MSAA.

Tom Stellard tom at stellard.net
Mon Sep 30 18:35:30 PDT 2013


On Mon, Sep 30, 2013 at 11:46:25PM +0200, Vincent Lejeune wrote:
> ---
>  lib/Target/R600/R600ISelLowering.cpp | 6 +++++-
>  lib/Target/R600/R600Instructions.td  | 4 ++++
>  lib/Target/R600/R600Intrinsics.td    | 1 +
>  3 files changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp
> index 126db73..a6778a4 100644
> --- a/lib/Target/R600/R600ISelLowering.cpp
> +++ b/lib/Target/R600/R600ISelLowering.cpp
> @@ -590,7 +590,8 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
>      case AMDGPUIntrinsic::R600_txf:
>      case AMDGPUIntrinsic::R600_txq:
>      case AMDGPUIntrinsic::R600_ddx:
> -    case AMDGPUIntrinsic::R600_ddy: {
> +    case AMDGPUIntrinsic::R600_ddy:
> +    case AMDGPUIntrinsic::R600_ldptr: {
>        unsigned TextureOp;
>        switch (IntrinsicID) {
>        case AMDGPUIntrinsic::R600_tex:
> @@ -623,6 +624,9 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
>        case AMDGPUIntrinsic::R600_ddy:
>          TextureOp = 9;
>          break;
> +      case AMDGPUIntrinsic::R600_ldptr:
> +        TextureOp = 10;
> +        break;
>        default:
>          llvm_unreachable("Unknow Texture Operation");
>        }
> diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td
> index 82ecbad..9dc9303 100644
> --- a/lib/Target/R600/R600Instructions.td
> +++ b/lib/Target/R600/R600Instructions.td
> @@ -881,6 +881,9 @@ def TEX_SAMPLE_C_L : R600_TEX <0x19, "TEX_SAMPLE_C_L">;
>  def TEX_SAMPLE_LB : R600_TEX <0x12, "TEX_SAMPLE_LB">;
>  def TEX_SAMPLE_C_LB : R600_TEX <0x1A, "TEX_SAMPLE_C_LB">;
>  def TEX_LD : R600_TEX <0x03, "TEX_LD">;
> +def TEX_LDPTR : R600_TEX <0x03, "TEX_LDPTR"> {

Can you use a named field here so it is easier to read:

field bits<2> inst_mod = 1;
let Inst{6-5} = inst_mod;

> +  let Inst{6-5} = 1;
> +}

With that change:

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

>  def TEX_GET_TEXTURE_RESINFO : R600_TEX <0x04, "TEX_GET_TEXTURE_RESINFO">;
>  def TEX_GET_GRADIENTS_H : R600_TEX <0x07, "TEX_GET_GRADIENTS_H">;
>  def TEX_GET_GRADIENTS_V : R600_TEX <0x08, "TEX_GET_GRADIENTS_V">;
> @@ -899,6 +902,7 @@ defm : TexPattern<6, TEX_LD, v4i32>;
>  defm : TexPattern<7, TEX_GET_TEXTURE_RESINFO, v4i32>;
>  defm : TexPattern<8, TEX_GET_GRADIENTS_H>;
>  defm : TexPattern<9, TEX_GET_GRADIENTS_V>;
> +defm : TexPattern<10, TEX_LDPTR, v4i32>;
>  
>  //===----------------------------------------------------------------------===//
>  // Helper classes for common instructions
> diff --git a/lib/Target/R600/R600Intrinsics.td b/lib/Target/R600/R600Intrinsics.td
> index 58d86b6..b5cb369 100644
> --- a/lib/Target/R600/R600Intrinsics.td
> +++ b/lib/Target/R600/R600Intrinsics.td
> @@ -52,6 +52,7 @@ let TargetPrefix = "R600", isTarget = 1 in {
>    def int_R600_txb : TextureIntrinsicFloatInput;
>    def int_R600_txbc : TextureIntrinsicFloatInput;
>    def int_R600_txf : TextureIntrinsicInt32Input;
> +  def int_R600_ldptr : TextureIntrinsicInt32Input;
>    def int_R600_txq : TextureIntrinsicInt32Input;
>    def int_R600_ddx : TextureIntrinsicFloatInput;
>    def int_R600_ddy : TextureIntrinsicFloatInput;
> -- 
> 1.8.3.1
> 
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