[Mesa-dev] [PATCH 4/9] i965/fs: Skip emitting MACH/MOV for small integers.

Kenneth Graunke kenneth at whitecape.org
Sun Apr 6 23:49:50 PDT 2014


The vector backend already implemented this optimization, but
surprisingly, we never bothered to implement it in the scalar backend.

In addition to saving two instructions, this eliminates a use of the
accumulator as an explicit source, which is unsupported in SIMD16 mode
on Gen7+, which could help us gain SIMD16 programs.

Cuts 19.23% of the instructions in dolphin/efb2ram.shader_test.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
---
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 33 ++++++++++++++++++----------
 1 file changed, 21 insertions(+), 12 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index ce6d3da..dbb16ce 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -458,18 +458,27 @@ fs_visitor::visit(ir_expression *ir)
 	  * of one of the operands (src0 on gen6, src1 on gen7).  The
 	  * MACH accumulates in the contribution of the upper 16 bits
 	  * of that operand.
-	  *
-	  * FINISHME: Emit just the MUL if we know an operand is small
-	  * enough.
-	  */
-	 if (brw->gen >= 7)
-	    no16("SIMD16 explicit accumulator operands unsupported\n");
-
-	 struct brw_reg acc = retype(brw_acc_reg(), this->result.type);
-
-	 emit(MUL(acc, op[0], op[1]));
-	 emit(MACH(reg_null_d, op[0], op[1]));
-	 emit(MOV(this->result, fs_reg(acc)));
+          */
+         if (ir->operands[0]->is_16bit_integer_constant()) {
+            if (brw->gen < 7)
+               emit(MUL(this->result, op[0], op[1]));
+            else
+               emit(MUL(this->result, op[1], op[0]));
+         } else if (ir->operands[1]->is_16bit_integer_constant()) {
+            if (brw->gen < 7)
+               emit(MUL(this->result, op[1], op[0]));
+            else
+               emit(MUL(this->result, op[0], op[1]));
+         } else {
+            if (brw->gen >= 7)
+               no16("SIMD16 explicit accumulator operands unsupported\n");
+
+            struct brw_reg acc = retype(brw_acc_reg(), this->result.type);
+
+            emit(MUL(acc, op[0], op[1]));
+            emit(MACH(reg_null_d, op[0], op[1]));
+            emit(MOV(this->result, fs_reg(acc)));
+         }
       } else {
 	 emit(MUL(this->result, op[0], op[1]));
       }
-- 
1.9.0



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