[Mesa-dev] [PATCH] fixup! i965: Add writes_accumulator flag

Matt Turner mattst88 at gmail.com
Wed Apr 9 17:12:31 PDT 2014


---
Eric, how about this squashed in?

On Gen < 6 any accumulator use, with the exception of the "implied
update" that nearly every instruction does causes a barrier dep.
Implicit writes, noted by ::writes_accumulator, causes a barrier dep.

On Gen >= 6, we just track the accumulator dependencies with
last_accumulator_write.

 .../drivers/dri/i965/brw_schedule_instructions.cpp | 74 ++++++++++++++++------
 1 file changed, 55 insertions(+), 19 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index 910b73a..8cc6908 100644
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -742,6 +742,8 @@ fs_instruction_scheduler::is_compressed(fs_inst *inst)
 void
 fs_instruction_scheduler::calculate_deps()
 {
+   const bool gen6plus = v->brw->gen >= 6;
+
    /* Pre-register-allocation, this tracks the last write per VGRF (so
     * different reg_offsets within it can interfere when they shouldn't).
     * After register allocation, reg_offsets are gone and we track individual
@@ -801,7 +803,7 @@ fs_instruction_scheduler::calculate_deps()
             } else {
                add_dep(last_fixed_grf_write, n);
             }
-         } else if (inst->src[i].is_accumulator()) {
+         } else if (inst->src[i].is_accumulator() && gen6plus) {
             add_dep(last_accumulator_write, n);
 	 } else if (inst->src[i].file != BAD_FILE &&
 		    inst->src[i].file != IMM &&
@@ -826,7 +828,11 @@ fs_instruction_scheduler::calculate_deps()
       }
 
       if (inst->reads_accumulator_implicitly()) {
-         add_dep(last_accumulator_write, n);
+         if (gen6plus) {
+            add_dep(last_accumulator_write, n);
+         } else {
+            add_barrier_deps(n);
+         }
       }
 
       /* write-after-write deps. */
@@ -861,7 +867,7 @@ fs_instruction_scheduler::calculate_deps()
          } else {
             last_fixed_grf_write = n;
          }
-      } else if (inst->dst.is_accumulator()) {
+      } else if (inst->dst.is_accumulator() && gen6plus) {
          add_dep(last_accumulator_write, n);
          last_accumulator_write = n;
       } else if (inst->dst.file != BAD_FILE &&
@@ -882,8 +888,12 @@ fs_instruction_scheduler::calculate_deps()
       }
 
       if (inst->writes_accumulator) {
-         add_dep(last_accumulator_write, n);
-         last_accumulator_write = n;
+         if (gen6plus) {
+            add_dep(last_accumulator_write, n);
+            last_accumulator_write = n;
+         } else {
+            add_barrier_deps(n);
+         }
       }
    }
 
@@ -923,7 +933,7 @@ fs_instruction_scheduler::calculate_deps()
             } else {
                add_dep(n, last_fixed_grf_write);
             }
-         } else if (inst->src[i].is_accumulator()) {
+         } else if (inst->src[i].is_accumulator() && gen6plus) {
             add_dep(n, last_accumulator_write);
          } else if (inst->src[i].file != BAD_FILE &&
 		    inst->src[i].file != IMM &&
@@ -948,7 +958,11 @@ fs_instruction_scheduler::calculate_deps()
       }
 
       if (inst->reads_accumulator_implicitly()) {
-         add_dep(n, last_accumulator_write);
+         if (gen6plus) {
+            add_dep(n, last_accumulator_write);
+         } else {
+            add_barrier_deps(n);
+         }
       }
 
       /* Update the things this instruction wrote, so earlier reads
@@ -982,7 +996,7 @@ fs_instruction_scheduler::calculate_deps()
          } else {
             last_fixed_grf_write = n;
          }
-      } else if (inst->dst.is_accumulator()) {
+      } else if (inst->dst.is_accumulator() && gen6plus) {
          last_accumulator_write = n;
       } else if (inst->dst.file != BAD_FILE &&
                  !inst->dst.is_null()) {
@@ -1000,7 +1014,11 @@ fs_instruction_scheduler::calculate_deps()
       }
 
       if (inst->writes_accumulator) {
-         last_accumulator_write = n;
+         if (gen6plus) {
+            last_accumulator_write = n;
+         } else {
+            add_barrier_deps(n);
+         }
       }
    }
 }
@@ -1008,6 +1026,8 @@ fs_instruction_scheduler::calculate_deps()
 void
 vec4_instruction_scheduler::calculate_deps()
 {
+   const bool gen6plus = v->brw->gen >= 6;
+
    schedule_node *last_grf_write[grf_count];
    schedule_node *last_mrf_write[BRW_MAX_MRF];
    schedule_node *last_conditional_mod = NULL;
@@ -1047,7 +1067,7 @@ vec4_instruction_scheduler::calculate_deps()
                     (inst->src[i].fixed_hw_reg.file ==
                      BRW_GENERAL_REGISTER_FILE)) {
             add_dep(last_fixed_grf_write, n);
-         } else if (inst->src[i].is_accumulator()) {
+         } else if (inst->src[i].is_accumulator() && gen6plus) {
             assert(last_accumulator_write);
             add_dep(last_accumulator_write, n);
          } else if (inst->src[i].file != BAD_FILE &&
@@ -1074,8 +1094,12 @@ vec4_instruction_scheduler::calculate_deps()
       }
 
       if (inst->reads_accumulator_implicitly()) {
-         assert(last_accumulator_write);
-         add_dep(last_accumulator_write, n);
+         if (gen6plus) {
+            assert(last_accumulator_write);
+            add_dep(last_accumulator_write, n);
+         } else {
+            add_barrier_deps(n);
+         }
       }
 
       /* write-after-write deps. */
@@ -1088,7 +1112,7 @@ vec4_instruction_scheduler::calculate_deps()
      } else if (inst->dst.file == HW_REG &&
                  inst->dst.fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) {
          last_fixed_grf_write = n;
-      } else if (inst->dst.is_accumulator()) {
+      } else if (inst->dst.is_accumulator() && gen6plus) {
          add_dep(last_accumulator_write, n);
          last_accumulator_write = n;
       } else if (inst->dst.file != BAD_FILE &&
@@ -1109,8 +1133,12 @@ vec4_instruction_scheduler::calculate_deps()
       }
 
       if (inst->writes_accumulator) {
-         add_dep(last_accumulator_write, n);
-         last_accumulator_write = n;
+         if (gen6plus) {
+            add_dep(last_accumulator_write, n);
+            last_accumulator_write = n;
+         } else {
+            add_barrier_deps(n);
+         }
       }
    }
 
@@ -1137,7 +1165,7 @@ vec4_instruction_scheduler::calculate_deps()
                     (inst->src[i].fixed_hw_reg.file ==
                      BRW_GENERAL_REGISTER_FILE)) {
             add_dep(n, last_fixed_grf_write);
-         } else if (inst->src[i].is_accumulator()) {
+         } else if (inst->src[i].is_accumulator() && gen6plus) {
             add_dep(n, last_accumulator_write);
          } else if (inst->src[i].file != BAD_FILE &&
                     inst->src[i].file != IMM &&
@@ -1161,7 +1189,11 @@ vec4_instruction_scheduler::calculate_deps()
       }
 
       if (inst->reads_accumulator_implicitly()) {
-         add_dep(n, last_accumulator_write);
+         if (gen6plus) {
+            add_dep(n, last_accumulator_write);
+         } else {
+            add_barrier_deps(n);
+         }
       }
 
       /* Update the things this instruction wrote, so earlier reads
@@ -1174,7 +1206,7 @@ vec4_instruction_scheduler::calculate_deps()
       } else if (inst->dst.file == HW_REG &&
                  inst->dst.fixed_hw_reg.file == BRW_GENERAL_REGISTER_FILE) {
          last_fixed_grf_write = n;
-      } else if (inst->dst.is_accumulator()) {
+      } else if (inst->dst.is_accumulator() && gen6plus) {
          last_accumulator_write = n;
       } else if (inst->dst.file != BAD_FILE &&
                  !inst->dst.is_null()) {
@@ -1192,7 +1224,11 @@ vec4_instruction_scheduler::calculate_deps()
       }
 
       if (inst->writes_accumulator) {
-         last_accumulator_write = n;
+         if (gen6plus) {
+            last_accumulator_write = n;
+         } else {
+            add_barrier_deps(n);
+         }
       }
    }
 }
-- 
1.8.3.2



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