[Mesa-dev] Map W-tiled as linear instead of as Y-tiled for i965-blorp

[Topi Pohjolainen]

Patches one and two prepare for the mapping change. Once the surface is
configured as linear one cannot use hardware msaa support anymore, and the
offsets to the miplevels/layers wouldn't match between linear and W-tiled
within the 64x64 tiles. Fortunately the blorp blit program can be adjusted
with relatively small pain.

Patches 4-12 are re-submission of patches from my stencil texturing series.
They merge some of the duplicated logic between fs and vec4 ir-visitors and
split them in two parts: visitors and emitters. There is still quite a bit of
pure LIR-emission logic left in fs_visitor. I only moved as much as was
needed for blorp blitter for now. The motivation is to later share coordinate
translation logic between blorp and regular fragment programs.

           before                        after
           ------                        -----

       backend_visitor       backend_visitor   backend_emitter
             |                     |                 |
            / \                   / \               / \
             |                     |                 |
      +------+------+       +------+------+   +------+------+
      |             |       |             |   |             |
 vec4_visitor   fs_visitor  |          vec4_visitor     fs_emitter
                            |                               |
                            |                              / \
                            |                               |
                            |                        +------+------+
                            |                        |             |
                            +------------+-----------+  brw_blorp_eu_emitter
                                         |
                                    fs_visitor

I needed integer quotient and remainder instructions for translating W-tiled
coordinates into linear space and as gen7 does not support these for SIMD16
I added support in the generator to emit two SIMD8 instructions instead. I
didn't dare to hook this into regular fragment compiler as I'm not sure of
all the consequenses. On gen6 in turn the push constant representing the
stride cannot be used as the operand as such and hence a copy is needed.

I'm hoping to build the support for ARB_stencil_texturing and using stencil
texture as render target in regular fragment programs on top this. I already
experimented with the former using bits from my earlier series, and it passes
the simple sampling tests we have in piglit just fine.

No regression seen on IVB and SNB.

Topi Pohjolainen (20):
  i965/blorp: Single sample stencil msaa
  i965/blorp: Use program to offset W-tiled into correct level/layer
  i965/blorp: Drop unnecessary tile offset calculator
  i965: Split emitter out of backend_visitor
  i965: Merge memory context allocation for shader visitors
  i965: Merge max_grf between stage compilers
  i965/vec4: Use unsigned instead of signed for visitor uniform count
  i965: Merge common members of visitors
  i965: Merge fail() for ir visitors
  i965/fs: Split LIR emission ouf of ir-visitor
  i965/fs: Move emission of ALUs into fs_emitter
  i965/blorp: Use fs_emitter
  i965/fs: Add generator support for simd16 math as 2x simd8
  i965/fs: Add support for W-tiled coordinate swizzling
  i965/fs: Add support for linear to W-tiled coordinate translation
  i965/fs: Add support for W-tiled to linear coordinate translation
  i965/blorp: Increase the scope for the coordinate accessors
  i965/blorp: Add source and destination strides into push constants
  i965: Expose the linear offset calculation of W-tiled stencil
  i965/blorp: Translate w-tiling into linear instead of into Y-tiling

 src/mesa/drivers/dri/i965/Makefile.sources         |   1 +
 src/mesa/drivers/dri/i965/brw_blorp.cpp            |  34 +-
 src/mesa/drivers/dri/i965/brw_blorp.h              |   6 +-
 src/mesa/drivers/dri/i965/brw_blorp_blit.cpp       | 521 +++++++++++----------
 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp    |  28 +-
 src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h      | 110 +----
 src/mesa/drivers/dri/i965/brw_cfg.cpp              |   8 +-
 src/mesa/drivers/dri/i965/brw_cfg.h                |   4 +-
 .../drivers/dri/i965/brw_dead_control_flow.cpp     |   6 +-
 src/mesa/drivers/dri/i965/brw_dead_control_flow.h  |   2 +-
 src/mesa/drivers/dri/i965/brw_fs.cpp               | 163 -------
 src/mesa/drivers/dri/i965/brw_fs.h                 | 159 ++++---
 src/mesa/drivers/dri/i965/brw_fs_emitter.cpp       | 400 ++++++++++++++++
 src/mesa/drivers/dri/i965/brw_fs_generator.cpp     |  11 +-
 src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp  |   2 +-
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp       |  53 +--
 .../drivers/dri/i965/brw_schedule_instructions.cpp |   4 +-
 src/mesa/drivers/dri/i965/brw_shader.cpp           |  72 ++-
 src/mesa/drivers/dri/i965/brw_shader.h             |  63 ++-
 src/mesa/drivers/dri/i965/brw_vec4.cpp             |  14 +-
 src/mesa/drivers/dri/i965/brw_vec4.h               |  30 +-
 src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp  |   7 +-
 src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h    |   1 -
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp     |  59 +--
 src/mesa/drivers/dri/i965/brw_vec4_vp.cpp          |   2 +-
 src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp  |   5 +-
 src/mesa/drivers/dri/i965/brw_vs.h                 |   3 +-
 src/mesa/drivers/dri/i965/gen6_blorp.cpp           |  25 +-
 src/mesa/drivers/dri/i965/gen7_blorp.cpp           |  27 +-
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c      |   2 +-
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h      |   3 +
 .../drivers/dri/i965/test_blorp_blit_eu_gen.cpp    | 135 ------
 .../dri/i965/test_vec4_copy_propagation.cpp        |   3 +-
 .../dri/i965/test_vec4_register_coalesce.cpp       |   3 +-
 34 files changed, 973 insertions(+), 993 deletions(-)
 create mode 100644 src/mesa/drivers/dri/i965/brw_fs_emitter.cpp

-- 
1.8.3.1