[Mesa-dev] [PATCH] i965: Make Broadwell HiZ path arrange for TC flushes.

[Eric Anholt]

Kenneth Graunke <kenneth at whitecape.org> writes:

> HiZ operations make the depth/render caches out of sync with the sampler
> caches.  We need to arrange for a TC flush to happen before the target
> buffer is used by the sampler.  Calling brw_render_cache_set_add_bo
> makes that happen.

Reviewed-by: Eric Anholt <eric at anholt.net>
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